Files
openocd/contrib/loaders/flash/stm32x.s
Freddie Chopin 015bf55944 Add comments and tiny improvements to STM32 flash loader algorithm
Add comments to assembly flash loader for STM32. Add tiny improvement in
size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%,
as time is wasted on waiting for end of operation anyway).

Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-11-15 09:17:14 +01:00

57 lines
2.5 KiB
ArmAsm

/***************************************************************************
* Copyright (C) 2010 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
.text
.syntax unified
.thumb
.thumb_func
.global write
/*
r0 - source address
r1 - target address
r2 - count (halfword-16bit)
r3 - result
r4 - temp
*/
#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
#define STM32_FLASH_SR_OFFSET 0x0c /* offset of CR register in FLASH struct */
write:
ldr r4, STM32_FLASH_BASE
write_half_word:
movs r3, #0x01
str r3, [r4, #STM32_FLASH_CR_OFFSET] /* PG (bit0) == 1 => flash programming enabled */
ldrh r3, [r0], #0x02 /* read one half-word from src, increment ptr */
strh r3, [r1], #0x02 /* write one half-word from src, increment ptr */
busy:
ldr r3, [r4, #STM32_FLASH_SR_OFFSET]
tst r3, #0x01 /* BSY (bit0) == 1 => operation in progress */
beq busy /* wait more... */
tst r3, #0x14 /* PGERR (bit2) == 1 or WRPRTERR (bit4) == 1 => error */
bne exit /* fail... */
subs r2, r2, #0x01 /* decrement counter */
bne write_half_word /* write next half-word if anything left */
exit:
bkpt #0x00
STM32_FLASH_BASE: .word 0x40022000 /* base address of FLASH struct */