Tim Newsome
274be9587f
* Align algorithm stack to XLEN. This fixes algorithm timeout on RV64 targets. Also improve debug information in various places. Change-Id: Id3121f9c6e753c6a7e14da511e4de0587a6f7b4d * Compile 32-bit RISC-V algorithms for RV32E. Change-Id: I33a698c0c6ba540de29fa0459242c72a67b0cbaa * Remove debug code. Change-Id: I37c966ce0f2d1fe68cd6ae0724d19ae95ebaf51b * Dump start of gdb packets escaping non-printable. Change-Id: Ie5f36b5c9041bfc0e5aa9543f0afe2c4810c2915 * Propagate flash programming errors. Change-Id: I0c938ce7a1062bcc93426538cbc82424000f37b7 * Improve debug messaging. Change-Id: I47ac3518f3b241986c677824864102936100adf6 * Add debug output to flash image. This is helpful when you're debugging the flash algorithm itself, and a nop when running it through OpenOCD. Change-Id: Id44c6498c288872cc2cec79044116ac38198c572 * Make timeout depend on how much data is written. Change-Id: I819efa04cd6f6bd6664afd5c53cc7a8a5c84f54e * Fix issi erase commands. This is required to flash HiFive Unleashed. Change-Id: I33e4869d1d05ca8a1df6136bccf11afda61bfe10 * Fix running algorithm on multicore `-rtos riscv`. The bug was that poll() might change the currently selected hart, and in that case we'd access registers on that other hart after the algorithm is finished. Change-Id: I140431898285cf471b372139cef2378ab4879377 * Make fespi flash algorithm debugging optional. Also add a scheme that allows you to see the stack trace of where a failure occurred if debugging is enabled. Change-Id: Ia9a3a9a941ceba0f8ff6b47da5a8643e5f84b252
52 lines
1.1 KiB
Makefile
52 lines
1.1 KiB
Makefile
BIN2C = ../../../../src/helper/bin2char.sh
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CROSS_COMPILE ?= riscv64-unknown-elf-
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RISCV_CC=$(CROSS_COMPILE)gcc
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RISCV_OBJCOPY=$(CROSS_COMPILE)objcopy
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RISCV_OBJDUMP=$(CROSS_COMPILE)objdump
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CFLAGS = -nostdlib -nostartfiles -Wall -Werror -Os -fPIC -Wunused-result -g
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RISCV32_CFLAGS = -march=rv32e -mabi=ilp32e $(CFLAGS)
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RISCV64_CFLAGS = -march=rv64i -mabi=lp64 $(CFLAGS)
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all: riscv32_fespi.inc riscv64_fespi.inc
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.PHONY: clean
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# .c -> .o
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riscv32_%.o: riscv_%.c
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$(RISCV_CC) -c $(RISCV32_CFLAGS) $^ -o $@
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riscv64_%.o: riscv_%.c
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$(RISCV_CC) -c $(RISCV64_CFLAGS) $< -o $@
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# .S -> .o
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riscv32_%.o: riscv_%.S
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$(RISCV_CC) -c $(RISCV32_CFLAGS) $^ -o $@
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riscv64_%.o: riscv_%.S
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$(RISCV_CC) -c $(RISCV64_CFLAGS) $^ -o $@
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# .o -> .elf
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riscv32_%.elf: riscv32_%.o riscv32_wrapper.o
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$(RISCV_CC) -T riscv.lds $(RISCV32_CFLAGS) $^ -o $@
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riscv64_%.elf: riscv64_%.o riscv64_wrapper.o
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$(RISCV_CC) -T riscv.lds $(RISCV64_CFLAGS) $^ -o $@
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# .elf -> .bin
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%.bin: %.elf
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$(RISCV_OBJCOPY) -Obinary $< $@
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# .bin -> .inc
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%.inc: %.bin
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$(BIN2C) < $< > $@
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# utility
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%.lst: %.elf
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$(RISCV_OBJDUMP) -S $< > $@
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clean:
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-rm -f *.elf *.o *.lst *.bin *.inc
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