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ARM: rename ARMV4_5_MODE_* as ARM_MODE_*

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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
2009-12-04 19:21:14 -08:00
parent 31e3ea7c19
commit 0073e7a69e
16 changed files with 141 additions and 141 deletions
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4
src/flash/arm_nandio.c
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@@ -137,7 +137,7 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
/* set up algorithm and parameters */
algo.common_magic = ARMV4_5_COMMON_MAGIC;
algo.core_mode = ARMV4_5_MODE_SVC;
algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
@@ -213,7 +213,7 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
/* set up algorithm and parameters */
algo.common_magic = ARMV4_5_COMMON_MAGIC;
algo.core_mode = ARMV4_5_MODE_SVC;
algo.core_mode = ARM_MODE_SVC;
algo.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);

2
src/flash/nor/aduc702x.c
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@@ -242,7 +242,7 @@ static int aduc702x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32
}
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);

4
src/flash/nor/cfi.c
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@@ -1086,7 +1086,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3
cfi_intel_clear_status_register(bank);
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
/* If we are setting up the write_algorith, we need target_code_src */
@@ -1409,7 +1409,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui
};
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
int target_code_size;

2
src/flash/nor/ecos.c
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@@ -211,7 +211,7 @@ static int runCode(struct ecosflash_flash_bank *info,
struct reg_param reg_params[3];
struct armv4_5_algorithm armv4_5_info;
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);

2
src/flash/nor/lpc2000.c
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@@ -293,7 +293,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, int code, uint32_t param_ta
case lpc2000_v1:
case lpc2000_v2:
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
iap_entry_point = 0x7ffffff1;
break;

2
src/flash/nor/lpc2900.c
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@@ -1424,7 +1424,7 @@ static int lpc2900_write(struct flash_bank *bank, uint8_t *buffer,
/* Execute algorithm, assume breakpoint for last instruction */
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
retval = target_run_algorithm(target, 0, NULL, 5, reg_params,

2
src/flash/nor/str7x.c
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@@ -372,7 +372,7 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t
}
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);

2
src/flash/nor/str9x.c
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@@ -409,7 +409,7 @@ static int str9x_write_block(struct flash_bank *bank,
}
armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
armv4_5_info.core_mode = ARM_MODE_SVC;
armv4_5_info.core_state = ARM_STATE_ARM;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);