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target/mips32: add fpu access support

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Add access to fpr and cp1 registers.
GDB can now check the FPRs with `info reg f` and change them.
Checkpatch-ignore: MACRO_ARG_REUSE

Change-Id: I63896ab6f6737054d8108db105a13a58e1446fbc
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7866
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Walter Ji
2023-11-17 16:46:55 +08:00
committed by Antonio Borneo
parent a88db9b121
commit 01a797af14
4 changed files with 245 additions and 12 deletions
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15
src/target/mips32_pracc.h
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@@ -103,6 +103,21 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info,
int mips32_cp0_write(struct mips_ejtag *ejtag_info,
uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
/**
* mips32_cp1_control_read
*
* @brief Simulates cfc1 ASM instruction (Move Control Word From Floating Point),
* i.e. implements copro C1 Control Register read.
*
* @param[in] ejtag_info
* @param[in] val Storage to hold read value
* @param[in] cp1_c_reg Number of copro C1 control register we want to read
*
* @return ERROR_OK on Success, ERROR_FAIL otherwise
*/
int mips32_cp1_control_read(struct mips_ejtag *ejtag_info,
uint32_t *val, uint32_t cp1_c_reg);
static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
{
if (ejtag_info->isa && ejtag_info->endianness)