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flash/stm32h7x: add support of STM32H7Ax/H7Bx devices

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this new device has the following features:
 - single core cortex-M7
 - 2MB flash - dual bank
    - page size 8k
    - write protection grouped by 4 sectors
    - write block size 128 bits (16 bytes)

the bit definition of FLASH_CR is different than STM32H74x,
that's why we introduced a helper to compute the FLASH_CR value

Change-Id: I4da10cde8dd215b1b0f2645f0efdba9d198038d1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5441
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tarek BOCHKATI
2020-02-07 00:12:48 +01:00
committed by Tomas Vanek
parent 98ea23a7ff
commit 0b7eca1769
3 changed files with 163 additions and 105 deletions
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182
src/flash/nor/stm32h7x.c
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@@ -57,8 +57,6 @@
#define FLASH_FW (1 << 6)
#define FLASH_START (1 << 7)
#define FLASH_SNB(a) ((a) << 8)
/* FLASH_SR register bits */
#define FLASH_BSY (1 << 0) /* Operation in progress */
#define FLASH_QW (1 << 2) /* Operation queue in progress */
@@ -101,25 +99,31 @@
#define FLASH_BANK1_ADDRESS 0x08100000
#define FLASH_REG_BASE_B0 0x52002000
#define FLASH_REG_BASE_B1 0x52002100
#define FLASH_SIZE_ADDRESS 0x1FF1E880
#define FLASH_BLOCK_SIZE 32
struct stm32h7x_rev {
uint16_t rev;
const char *str;
};
/* stm32h7x_part_info permits the store each device information and specificities.
* the default unit is byte unless the suffix '_kb' is used. */
struct stm32h7x_part_info {
uint16_t id;
const char *device_str;
const struct stm32h7x_rev *revs;
size_t num_revs;
unsigned int page_size;
unsigned int page_size_kb;
unsigned int block_size; /* flash write word size in bytes */
uint16_t max_flash_size_kb;
uint8_t has_dual_bank;
uint16_t first_bank_size_kb; /* Used when has_dual_bank is true */
uint32_t flash_regs_base; /* Flash controller registers location */
uint32_t fsize_addr; /* Location of FSIZE register */
uint32_t wps_group_size; /* write protection group sectors' count */
uint32_t wps_mask;
/* function to compute flash_cr register values */
uint32_t (*compute_flash_cr)(uint32_t cmd, int snb);
};
struct stm32h7x_flash_bank {
@@ -140,18 +144,58 @@ static const struct stm32h7x_rev stm32_450_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2001, "X" }, { 0x2003, "V" },
};
static const struct stm32h7x_rev stm32_480_revs[] = {
{ 0x1000, "A"},
};
static uint32_t stm32x_compute_flash_cr_450(uint32_t cmd, int snb)
{
return cmd | (snb << 8);
}
static uint32_t stm32x_compute_flash_cr_480(uint32_t cmd, int snb)
{
/* save FW and START bits, to be right shifted by 2 bits later */
const uint32_t tmp = cmd & (FLASH_FW | FLASH_START);
/* mask parallelism (ignored), FW and START bits */
cmd &= ~(FLASH_PSIZE_64 | FLASH_FW | FLASH_START);
return cmd | (tmp >> 2) | (snb << 6);
}
static const struct stm32h7x_part_info stm32h7x_parts[] = {
{
.id = 0x450,
.revs = stm32_450_revs,
.num_revs = ARRAY_SIZE(stm32_450_revs),
.device_str = "STM32H74x/75x",
.page_size = 128, /* 128 KB */
.page_size_kb = 128,
.block_size = 32,
.max_flash_size_kb = 2048,
.first_bank_size_kb = 1024,
.has_dual_bank = 1,
.flash_regs_base = FLASH_REG_BASE_B0,
.fsize_addr = FLASH_SIZE_ADDRESS,
.fsize_addr = 0x1FF1E880,
.wps_group_size = 1,
.wps_mask = 0xFF,
.compute_flash_cr = stm32x_compute_flash_cr_450,
},
{
.id = 0x480,
.revs = stm32_480_revs,
.num_revs = ARRAY_SIZE(stm32_480_revs),
.device_str = "STM32H7Ax/7Bx",
.page_size_kb = 8,
.block_size = 16,
.max_flash_size_kb = 2048,
.first_bank_size_kb = 1024,
.has_dual_bank = 1,
.flash_regs_base = FLASH_REG_BASE_B0,
.fsize_addr = 0x08FFF80C,
.wps_group_size = 4,
.wps_mask = 0xFFFFFFFF,
.compute_flash_cr = stm32x_compute_flash_cr_480,
},
};
@@ -170,9 +214,6 @@ FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
stm32x_info->probed = false;
stm32x_info->user_bank_size = bank->size;
bank->write_start_alignment = FLASH_BLOCK_SIZE;
bank->write_end_alignment = FLASH_BLOCK_SIZE;
return ERROR_OK;
}
@@ -403,14 +444,15 @@ static int stm32x_protect_check(struct flash_bank *bank)
return retval;
}
for (int i = 0; i < bank->num_sectors; i++) {
bank->sectors[i].is_protected = protection & (1 << i) ? 0 : 1;
}
for (int i = 0; i < bank->num_prot_blocks; i++)
bank->prot_blocks[i].is_protected = protection & (1 << i) ? 0 : 1;
return ERROR_OK;
}
static int stm32x_erase(struct flash_bank *bank, int first, int last)
{
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
int retval, retval2;
assert(first < bank->num_sectors);
@@ -436,13 +478,13 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
for (int i = first; i <= last; i++) {
LOG_DEBUG("erase sector %d", i);
retval = stm32x_write_flash_reg(bank, FLASH_CR,
FLASH_SER | FLASH_SNB(i) | FLASH_PSIZE_64);
stm32x_info->part_info->compute_flash_cr(FLASH_SER | FLASH_PSIZE_64, i));
if (retval != ERROR_OK) {
LOG_ERROR("Error erase sector %d", i);
goto flash_lock;
}
retval = stm32x_write_flash_reg(bank, FLASH_CR,
FLASH_SER | FLASH_SNB(i) | FLASH_PSIZE_64 | FLASH_START);
stm32x_info->part_info->compute_flash_cr(FLASH_SER | FLASH_PSIZE_64 | FLASH_START, i));
if (retval != ERROR_OK) {
LOG_ERROR("Error erase sector %d", i);
goto flash_lock;
@@ -501,18 +543,18 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
/*
* If the size of the data part of the buffer is not a multiple of FLASH_BLOCK_SIZE, we get
* If the size of the data part of the buffer is not a multiple of .block_size, we get
* "corrupted fifo read" pointer in target_run_flash_async_algorithm()
*/
uint32_t data_size = 512 * FLASH_BLOCK_SIZE; /* 16384 */
uint32_t data_size = 512 * stm32x_info->part_info->block_size;
uint32_t buffer_size = 8 + data_size;
struct working_area *write_algorithm;
struct working_area *source;
uint32_t address = bank->base + offset;
struct reg_param reg_params[5];
struct reg_param reg_params[6];
struct armv7m_algorithm armv7m_info;
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
int retval = ERROR_OK;
static const uint8_t stm32x_flash_write_code[] = {
@@ -555,21 +597,23 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* buffer end */
init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* target address */
init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT); /* count (word-256 bits) */
init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT); /* flash reg base */
init_reg_param(&reg_params[3], "r3", 32, PARAM_OUT); /* count of words (word size = .block_size (bytes) */
init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT); /* word size in bytes */
init_reg_param(&reg_params[5], "r5", 32, PARAM_OUT); /* flash reg base */
buf_set_u32(reg_params[0].value, 0, 32, source->address);
buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
buf_set_u32(reg_params[2].value, 0, 32, address);
buf_set_u32(reg_params[3].value, 0, 32, count);
buf_set_u32(reg_params[4].value, 0, 32, stm32x_info->flash_regs_base);
buf_set_u32(reg_params[4].value, 0, 32, stm32x_info->part_info->block_size);
buf_set_u32(reg_params[5].value, 0, 32, stm32x_info->flash_regs_base);
retval = target_run_flash_async_algorithm(target,
buffer,
count,
FLASH_BLOCK_SIZE,
stm32x_info->part_info->block_size,
0, NULL,
5, reg_params,
ARRAY_SIZE(reg_params), reg_params,
source->address, source->size,
write_algorithm->address, 0,
&armv7m_info);
@@ -598,6 +642,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
destroy_reg_param(&reg_params[2]);
destroy_reg_param(&reg_params[3]);
destroy_reg_param(&reg_params[4]);
destroy_reg_param(&reg_params[5]);
return retval;
}
@@ -605,6 +650,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t count)
{
struct target *target = bank->target;
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
uint32_t address = bank->base + offset;
int retval, retval2;
@@ -614,18 +660,18 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
}
/* should be enforced via bank->write_start_alignment */
assert(!(offset % FLASH_BLOCK_SIZE));
assert(!(offset % stm32x_info->part_info->block_size));
/* should be enforced via bank->write_end_alignment */
assert(!(count % FLASH_BLOCK_SIZE));
assert(!(count % stm32x_info->part_info->block_size));
retval = stm32x_unlock_reg(bank);
if (retval != ERROR_OK)
goto flash_lock;
uint32_t blocks_remaining = count / FLASH_BLOCK_SIZE;
uint32_t blocks_remaining = count / stm32x_info->part_info->block_size;
/* multiple words (32-bytes) to be programmed in block */
/* multiple words (n * .block_size) to be programmed in block */
if (blocks_remaining) {
retval = stm32x_write_block(bank, buffer, offset, blocks_remaining);
if (retval != ERROR_OK) {
@@ -635,8 +681,8 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
}
} else {
buffer += blocks_remaining * FLASH_BLOCK_SIZE;
address += blocks_remaining * FLASH_BLOCK_SIZE;
buffer += blocks_remaining * stm32x_info->part_info->block_size;
address += blocks_remaining * stm32x_info->part_info->block_size;
blocks_remaining = 0;
}
if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
@@ -653,11 +699,12 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
4. Wait for flash operations completion
*/
while (blocks_remaining > 0) {
retval = stm32x_write_flash_reg(bank, FLASH_CR, FLASH_PG | FLASH_PSIZE_64);
retval = stm32x_write_flash_reg(bank, FLASH_CR,
stm32x_info->part_info->compute_flash_cr(FLASH_PG | FLASH_PSIZE_64, 0));
if (retval != ERROR_OK)
goto flash_lock;
retval = target_write_buffer(target, address, FLASH_BLOCK_SIZE, buffer);
retval = target_write_buffer(target, address, stm32x_info->part_info->block_size, buffer);
if (retval != ERROR_OK)
goto flash_lock;
@@ -665,8 +712,8 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
if (retval != ERROR_OK)
goto flash_lock;
buffer += FLASH_BLOCK_SIZE;
address += FLASH_BLOCK_SIZE;
buffer += stm32x_info->part_info->block_size;
address += stm32x_info->part_info->block_size;
blocks_remaining--;
}
@@ -678,16 +725,6 @@ flash_lock:
return (retval == ERROR_OK) ? retval2 : retval;
}
static void setup_sector(struct flash_bank *bank, int start, int num, int size)
{
for (int i = start; i < (start + num) ; i++) {
assert(i < bank->num_sectors);
bank->sectors[i].offset = bank->size;
bank->sectors[i].size = size;
bank->size += bank->sectors[i].size;
}
}
static int stm32x_read_id_code(struct flash_bank *bank, uint32_t *id)
{
/* read stm32 device id register */
@@ -779,35 +816,45 @@ static int stm32x_probe(struct flash_bank *bank)
/* did we assign flash size? */
assert(flash_size_in_kb != 0xffff);
/* calculate numbers of pages */
int num_pages = flash_size_in_kb / stm32x_info->part_info->page_size;
/* check that calculation result makes sense */
assert(num_pages > 0);
if (bank->sectors) {
free(bank->sectors);
bank->sectors = NULL;
}
bank->base = base_address;
bank->num_sectors = num_pages;
bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
bank->size = flash_size_in_kb * 1024;
bank->write_start_alignment = stm32x_info->part_info->block_size;
bank->write_end_alignment = stm32x_info->part_info->block_size;
/* setup sectors */
bank->num_sectors = flash_size_in_kb / stm32x_info->part_info->page_size_kb;
assert(bank->num_sectors > 0);
if (bank->sectors)
free(bank->sectors);
bank->sectors = alloc_block_array(0, stm32x_info->part_info->page_size_kb * 1024,
bank->num_sectors);
if (bank->sectors == NULL) {
LOG_ERROR("failed to allocate bank sectors");
return ERROR_FAIL;
}
bank->size = 0;
/* fixed memory */
setup_sector(bank, 0, num_pages, stm32x_info->part_info->page_size * 1024);
/* setup protection blocks */
const uint32_t wpsn = stm32x_info->part_info->wps_group_size;
assert(bank->num_sectors % wpsn == 0);
for (int i = 0; i < num_pages; i++) {
bank->sectors[i].is_erased = -1;
bank->sectors[i].is_protected = 0;
bank->num_prot_blocks = bank->num_sectors / wpsn;
assert(bank->num_prot_blocks > 0);
if (bank->prot_blocks)
free(bank->prot_blocks);
bank->prot_blocks = alloc_block_array(0, stm32x_info->part_info->page_size_kb * wpsn * 1024,
bank->num_prot_blocks);
if (bank->prot_blocks == NULL) {
LOG_ERROR("failed to allocate bank prot_block");
return ERROR_FAIL;
}
stm32x_info->probed = true;
stm32x_info->probed = 1;
return ERROR_OK;
}
@@ -946,6 +993,7 @@ static int stm32x_mass_erase(struct flash_bank *bank)
{
int retval, retval2;
struct target *target = bank->target;
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
@@ -957,11 +1005,13 @@ static int stm32x_mass_erase(struct flash_bank *bank)
goto flash_lock;
/* mass erase flash memory bank */
retval = stm32x_write_flash_reg(bank, FLASH_CR, FLASH_BER | FLASH_PSIZE_64);
retval = stm32x_write_flash_reg(bank, FLASH_CR,
stm32x_info->part_info->compute_flash_cr(FLASH_BER | FLASH_PSIZE_64, 0));
if (retval != ERROR_OK)
goto flash_lock;
retval = stm32x_write_flash_reg(bank, FLASH_CR, FLASH_BER | FLASH_PSIZE_64 | FLASH_START);
retval = stm32x_write_flash_reg(bank, FLASH_CR,
stm32x_info->part_info->compute_flash_cr(FLASH_BER | FLASH_PSIZE_64 | FLASH_START, 0));
if (retval != ERROR_OK)
goto flash_lock;