forked from auracaster/openocd
Hongtao Zheng - more fixes to single stepping. Better hiding of details and fixes feroceon regression.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1110 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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@@ -1553,9 +1553,6 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
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if (!current)
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buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
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u32 current_pc;
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current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
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/* the front-end may request us not to handle breakpoints */
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if (handle_breakpoints)
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{
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@@ -1567,17 +1564,8 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
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return retval;
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}
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u32 next_pc;
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if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
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{
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u32 current_opcode;
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target_read_u32(target, current_pc, ¤t_opcode);
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LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
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return retval;
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}
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LOG_DEBUG("enable single-step");
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arm7_9->enable_single_step(target, next_pc);
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arm7_9->enable_single_step(target);
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target->debug_reason = DBG_REASON_SINGLESTEP;
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@@ -1687,13 +1675,23 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
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return ERROR_OK;
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}
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void arm7_9_enable_eice_step(target_t *target, u32 next_pc)
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void arm7_9_enable_eice_step(target_t *target)
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{
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armv4_5_common_t *armv4_5 = target->arch_info;
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arm7_9_common_t *arm7_9 = armv4_5->arch_info;
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int retval;
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u32 current_pc;
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current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
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u32 next_pc;
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if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
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{
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u32 current_opcode;
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target_read_u32(target, current_pc, ¤t_opcode);
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LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
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return retval;
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}
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if(next_pc != current_pc)
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{
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@@ -1758,9 +1756,6 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
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if (!current)
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buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
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u32 current_pc;
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current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
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/* the front-end may request us not to handle breakpoints */
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if (handle_breakpoints)
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if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
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@@ -1771,21 +1766,12 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
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target->debug_reason = DBG_REASON_SINGLESTEP;
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u32 next_pc;
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if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
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{
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u32 current_opcode;
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target_read_u32(target, current_pc, ¤t_opcode);
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LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
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return retval;
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}
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if ((retval = arm7_9_restore_context(target)) != ERROR_OK)
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{
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return retval;
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}
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arm7_9->enable_single_step(target, next_pc);
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arm7_9->enable_single_step(target);
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if (armv4_5->core_state == ARMV4_5_STATE_ARM)
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{
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