diff --git a/tcl/target/stm32h7x.cfg b/tcl/target/stm32h7x.cfg
index 5aae93861..a364e0682 100644
--- a/tcl/target/stm32h7x.cfg
+++ b/tcl/target/stm32h7x.cfg
@@ -126,7 +126,7 @@ if { [info exists QUADSPI] && $QUADSPI } {
 }
 
 # Clock after reset is HSI at 64 MHz, no need of PLL
-adapter speed 1800
+adapter speed 4000
 
 adapter srst delay 100
 if {[using_jtag]} {
@@ -198,11 +198,6 @@ $_CHIPNAME.cpu0 configure -event examine-end {
 	stm32h7x_dbgmcu_mmw 0x3000 0x00000003 0
 }
 
-$_CHIPNAME.cpu0 configure -event reset-init {
-	# Clock after reset is HSI at 64 MHz, no need of PLL
-	adapter speed 4000
-}
-
 # get _CHIPNAME from current target
 proc stm32h7x_get_chipname {} {
 	set t [target current]