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tcl/target: Fix include paths and standardise max32 configs

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Corrected the include path for max32xxx_common.cfg in some files.
Cleaned up and standarised some comments in the max32... files.

Change-Id: I94dcc7ba6868bdd9730f03d3aa76fcdbbae33c3e
Signed-off-by: Mark O'Donovan <shiftee@posteo.net>
Reviewed-on: https://review.openocd.org/c/openocd/+/9323
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Mark O'Donovan
2025-12-21 11:50:33 +00:00
committed by Tomas Vanek
parent f9ec0ed51f
commit 22a7bda336
7 changed files with 17 additions and 25 deletions
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3
tcl/target/max32620.cfg
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@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX32620 - Arm Cortex-M4F @ 96MHz
# Maxim Integrated MAX32620 OpenOCD target configuration file
# Set the reset pin configuration # Set the reset pin configuration
reset_config srst_only reset_config srst_only

3
tcl/target/max32625.cfg
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@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX32625 - Arm Cortex-M4F @ 96MHz
# Maxim Integrated MAX32625 OpenOCD target configuration file
# Set the reset pin configuration # Set the reset pin configuration
reset_config srst_only reset_config srst_only

3
tcl/target/max3263x.cfg
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@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX3263x - Arm Cortex-M4F @ 96MHz
# Maxim Integrated MAX3263X OpenOCD target configuration file
# Set the reset pin configuration # Set the reset pin configuration
reset_config none reset_config none

8
tcl/target/max32670.cfg
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@@ -1,10 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# maxim Integrated OpenOCD target configuration file # Maxim Integrated MAX32670 - Arm Cortex-M4F @ 100MHz
# reset pin configuration # Set the reset pin configuration
reset_config none reset_config none
adapter_nsrst_delay 200
adapter_nsrst_assert_width 200
# Set flash parameters # Set flash parameters
set FLASH_BASE 0x10000000 set FLASH_BASE 0x10000000
@@ -17,7 +15,7 @@ set FLASH_OPTIONS 0x01
# Use Serial Wire Debug # Use Serial Wire Debug
transport select swd transport select swd
source [find target/max32xxx.cfg] source [find target/max32xxx_common.cfg]
# Early revisions of the MAX32670 will disable SWD upon reset. There are reserved address locations # Early revisions of the MAX32670 will disable SWD upon reset. There are reserved address locations
# in the ROM code that can be used to insert breakpoints. # in the ROM code that can be used to insert breakpoints.

9
tcl/target/max32672.cfg
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@@ -1,10 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# maxim Integrated OpenOCD target configuration file # Maxim Integrated MAX32672 - Arm Cortex-M4F @ 100MHz
# reset pin configuration # Set the reset pin configuration
reset_config none reset_config none
adapter_nsrst_delay 200 adapter srst pulse_width 200
adapter_nsrst_assert_width 200
# Set flash parameters # Set flash parameters
set FLASH_BASE 0x10000000 set FLASH_BASE 0x10000000
@@ -17,7 +16,7 @@ set FLASH_OPTIONS 0x01
# Use Serial Wire Debug # Use Serial Wire Debug
transport select swd transport select swd
source [find target/max32xxx.cfg] source [find target/max32xxx_common.cfg]
# Add additional flash bank # Add additional flash bank
set FLASH_BASE 0x10080000 set FLASH_BASE 0x10080000

11
tcl/target/max32675.cfg
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@@ -1,10 +1,9 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# maxim Integrated OpenOCD target configuration file # Maxim Integrated MAX32675 - Arm Cortex-M4F @ 100MHz
# reset pin configuration # Set the reset pin configuration
reset_config none reset_config none
adapter_nsrst_delay 200 adapter srst pulse_width 200
adapter_nsrst_assert_width 200
# Set flash parameters # Set flash parameters
set FLASH_BASE 0x10000000 set FLASH_BASE 0x10000000
@@ -17,9 +16,9 @@ set FLASH_OPTIONS 0x01
# Use Serial Wire Debug # Use Serial Wire Debug
transport select swd transport select swd
source [find target/max32xxx.cfg] source [find target/max32xxx_common.cfg]
# Early revisions of the MAX3275 will disable SWD upon reset. There are reserved address locations # Early revisions of the MAX32675 will disable SWD upon reset. There are reserved address locations
# in the ROM code that can be used to insert breakpoints. # in the ROM code that can be used to insert breakpoints.
# This workaround will enable SWD for affected revisions. # This workaround will enable SWD for affected revisions.
$_CHIPNAME.cpu configure -event reset-assert-pre { $_CHIPNAME.cpu configure -event reset-assert-pre {

5
tcl/target/max32690.cfg
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@@ -1,9 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-or-later # SPDX-License-Identifier: GPL-2.0-or-later
# Maxim Integrated MAX32690 OpenOCD target configuration file # Maxim Integrated MAX32690 - Arm Cortex-M4F @ 120MHz
# Set the reset pin configuration # Set the reset pin configuration
reset_config srst_only reset_config srst_only
adapter srst delay 2
adapter srst pulse_width 2 adapter srst pulse_width 2
# Set flash parameters # Set flash parameters
@@ -17,7 +16,7 @@ set FLASH_OPTIONS 0x01
# Use Serial Wire Debug # Use Serial Wire Debug
transport select swd transport select swd
source [find target/max32xxx.cfg] source [find target/max32xxx_common.cfg]
# Add additional flash bank # Add additional flash bank
set FLASH_BASE 0x10300000 set FLASH_BASE 0x10300000