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target: semihosting: refresh URI to semihosting documentation

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Some link if not anymore accessible.
Replace them with current one and add a backup in case one gets
not accessible anymore.

Change-Id: Iffca714555e94e5322a5daac1ea756e36bbd3a8f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9188
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2025-10-25 16:15:03 +02:00
parent 709e635b39
commit 23fc7e9c96
4 changed files with 17 additions and 8 deletions
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7
doc/openocd.texi
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@@ -1193,9 +1193,10 @@ monitor mode debug, only "halt mode" debug.}
@cindex ARM semihosting @cindex ARM semihosting
When linked with a special runtime library provided with many When linked with a special runtime library provided with many
toolchains@footnote{See chapter 8 "Semihosting" in toolchains@footnote{See chapter 8 "Semihosting" in
@uref{http://infocenter.arm.com/help/topic/com.arm.doc.dui0203i/DUI0203I_rvct_developer_guide.pdf, @uref{https://developer.arm.com/documentation/dui0203/latest/semihosting,
ARM DUI 0203I}, the "RealView Compilation Tools Developer Guide". ARM DUI 0203}.
The CodeSourcery EABI toolchain also includes a semihosting library.}, A semihosting library if available in newlib/libgloss, in U-Boot,
in the CodeSourcery EABI toolchain, and others.},
your target code can use I/O facilities on the debug host. That library your target code can use I/O facilities on the debug host. That library
provides a small set of system calls which are handled by OpenOCD. provides a small set of system calls which are handled by OpenOCD.
It can let the debugger provide your system console and a file system, It can let the debugger provide your system console and a file system,

6
src/target/arm_semihosting.c
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@@ -22,7 +22,11 @@
* facilities on the host computer. The target application must be linked * facilities on the host computer. The target application must be linked
* against a library that forwards operation requests by using the SVC * against a library that forwards operation requests by using the SVC
* instruction trapped at the Supervisor Call vector by the debugger. * instruction trapped at the Supervisor Call vector by the debugger.
* Details can be found in chapter 8 of DUI0203I_rvct_developer_guide.pdf * Details can be found in
* "Semihosting for AArch32 and AArch64, 2025Q1"
* https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
* and in
* https://developer.arm.com/documentation/dui0203/latest/semihosting
* from ARM Ltd. * from ARM Ltd.
*/ */

6
src/target/semihosting_common.c
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@@ -24,8 +24,10 @@
* instruction trapped by the debugger. * instruction trapped by the debugger.
* *
* Details can be found in * Details can be found in
* "Semihosting for AArch32 and AArch64, Release 2.0" * "Semihosting for AArch32 and AArch64, 2025Q1"
* https://static.docs.arm.com/100863/0200/semihosting.pdf * https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
* and in
* https://developer.arm.com/documentation/dui0203/latest/semihosting
* from ARM Ltd. * from ARM Ltd.
*/ */

6
src/target/semihosting_common.h
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@@ -19,8 +19,10 @@
/* /*
* According to: * According to:
* "Semihosting for AArch32 and AArch64, Release 2.0" * "Semihosting for AArch32 and AArch64, 2025Q1"
* https://static.docs.arm.com/100863/0200/semihosting.pdf * https://github.com/ARM-software/abi-aa/releases/download/2025Q1/semihosting.pdf
* and to:
* https://developer.arm.com/documentation/dui0203/latest/semihosting/about-semihosting/the-semihosting-interface
* from ARM Ltd. * from ARM Ltd.
* *
* The available semihosting operation numbers passed in R0 are allocated * The available semihosting operation numbers passed in R0 are allocated