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doc: riscv: minor fixes in openocd.texi

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'smp' and 'smp_gdb' command do not have 'riscv' prefix.

Document 'riscv use_bscan_tunnel' and 'riscv set_bscan_tunnel_ir'
as {Config Command}

Change-Id: I7b57613c9fedcccd6d6b1438d7fc2d28ea34ba65
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/9133
Tested-by: jenkins
Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This commit is contained in:
Tomas Vanek
2025-09-17 15:50:32 +02:00
parent ab8fb1d981
commit 2913dff98a
1 changed files with 5 additions and 5 deletions
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doc/openocd.texi
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@@ -11800,19 +11800,19 @@ When utilizing version 0.11 of the RISC-V Debug Specification,
and DBUS registers, respectively.
@end deffn
@deffn {Command} {riscv smp} [on|off]
@deffn {Command} {smp} [on|off]
Display, enable or disable SMP handling mode. This command is needed only if
user wants to temporary @b{disable} SMP handling for an existing SMP group
(see @code{aarch64 smp} for additional information). To define an SMP
group the command @code{target smp} should be used.
@end deffn
@deffn {Command} {riscv smp_gdb} [core_id]
@deffn {Command} {smp_gdb} [core_id]
Display/set the current core displayed in GDB. This is needed only if
@code{riscv smp} was used.
@code{smp} was used.
@end deffn
@deffn {Command} {riscv use_bscan_tunnel} width [type]
@deffn {Config Command} {riscv use_bscan_tunnel} width [type]
Enable or disable use of a BSCAN tunnel to reach the Debug Module. Supply the
@var{width} of the DM transport TAP's instruction register to enable. The
@var{width} should fit into 7 bits. Supply a value of 0 to disable.
@@ -11836,7 +11836,7 @@ tunneled DR scan consists of:
@end enumerate
@end deffn
@deffn {Command} {riscv set_bscan_tunnel_ir} value
@deffn {Config Command} {riscv set_bscan_tunnel_ir} value
Allows the use_bscan_tunnel feature to target non Xilinx device by
specifying the JTAG TAP IR used to access the bscan tunnel.
@end deffn