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SPI table updates (some new devices and new info)

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read_cmd, qread_cmd, pprog_cmd added as some recent high densities devices
use variants for 4-byte addressing.

Some new flash and FRAM device ids added. FRAMs don't have write pages nor
erase commands or sector sizes. The corresponding entries are marked as
"not used" (i. e. zero). Checks in existing SPI flash drivers added to
handle these cases gracefully.

Change-Id: I5104bce7c815ac22f98bc32c1bb6db66b984404a
Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4773
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Andreas Bolsch
2018-11-18 17:08:20 +01:00
committed by Tomas Vanek
parent eb8dfd5ca8
commit 42f1cc576a
7 changed files with 277 additions and 96 deletions
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58
src/flash/nor/spi.h
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@@ -1,4 +1,7 @@
/***************************************************************************
* Copyright (C) 2018 by Andreas Bolsch *
* andreas.bolsch@mni.thm.de *
* *
* Copyright (C) 2012 by George Harris *
* george@luminairecoffee.com *
* *
@@ -22,40 +25,69 @@
#ifndef OPENOCD_FLASH_NOR_SPI_H
#define OPENOCD_FLASH_NOR_SPI_H
#ifndef __ASSEMBLER__
/* data structure to maintain flash ids from different vendors */
struct flash_device {
char *name;
uint8_t read_cmd;
uint8_t qread_cmd;
uint8_t pprog_cmd;
uint8_t erase_cmd;
uint8_t chip_erase_cmd;
uint32_t device_id;
uint32_t pagesize;
unsigned long sectorsize;
unsigned long size_in_bytes;
uint32_t sectorsize;
uint32_t size_in_bytes;
};
#define FLASH_ID(n, es, ces, id, psize, ssize, size) \
{ \
.name = n, \
.erase_cmd = es, \
.chip_erase_cmd = ces, \
.device_id = id, \
.pagesize = psize, \
.sectorsize = ssize, \
.size_in_bytes = size \
#define FLASH_ID(n, re, qr, pp, es, ces, id, psize, ssize, size) \
{ \
.name = n, \
.read_cmd = re, \
.qread_cmd = qr, \
.pprog_cmd = pp, \
.erase_cmd = es, \
.chip_erase_cmd = ces, \
.device_id = id, \
.pagesize = psize, \
.sectorsize = ssize, \
.size_in_bytes = size, \
}
#define FRAM_ID(n, re, qr, pp, id, size) \
{ \
.name = n, \
.read_cmd = re, \
.qread_cmd = qr, \
.pprog_cmd = pp, \
.erase_cmd = 0x00, \
.chip_erase_cmd = 0x00, \
.device_id = id, \
.pagesize = 0, \
.sectorsize = 0, \
.size_in_bytes = size, \
}
extern const struct flash_device flash_devices[];
#endif
/* fields in SPI flash status register */
#define SPIFLASH_BSY_BIT 0x00000001 /* WIP Bit of SPI SR on SMI SR */
#define SPIFLASH_WE_BIT 0x00000002 /* WEL Bit of SPI SR on SMI SR */
#define SPIFLASH_BSY 0
#define SPIFLASH_BSY_BIT (1 << SPIFLASH_BSY) /* WIP Bit of SPI SR */
#define SPIFLASH_WE 1
#define SPIFLASH_WE_BIT (1 << SPIFLASH_WE) /* WEL Bit of SPI SR */
/* SPI Flash Commands */
#define SPIFLASH_READ_ID 0x9F /* Read Flash Identification */
#define SPIFLASH_READ_MID 0xAF /* Read Flash Identification, multi-io */
#define SPIFLASH_READ_STATUS 0x05 /* Read Status Register */
#define SPIFLASH_WRITE_ENABLE 0x06 /* Write Enable */
#define SPIFLASH_PAGE_PROGRAM 0x02 /* Page Program */
#define SPIFLASH_FAST_READ 0x0B /* Fast Read */
#define SPIFLASH_READ 0x03 /* Normal Read */
#define SPIFLASH_DEF_PAGESIZE 256 /* default for non-page-oriented devices (FRAMs) */
#endif /* OPENOCD_FLASH_NOR_SPI_H */