forked from auracaster/openocd
target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at the same time. Also define matching TARGET_PRI*ADDR format macros as well as a convenient TARGET_ADDR_FMT. In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000) be least invasive by leaving the formatting unchanged apart from the type; for generic code adopt TARGET_ADDR_FMT as unified address format. Don't silently change gdb formatting here, leave that to later. Add COMMAND_PARSE_ADDRESS() macro to abstract the address type. Implement it using its own parse_target_addr() function, in the hopes of catching pointer type mismatches better. Add '--disable-target64' configure option to revert to previous 32-bit target address behavior. Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5 Signed-off-by: Dongxue Zhang <elta.era@gmail.com> Signed-off-by: David Ung <david.ung.42@gmail.com> [AF: Default to enabling (Paul Fertser), rename macros, simplify] Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
This commit is contained in:
committed by
Matthias Welwarsky
parent
0ecee83266
commit
47b8cf8420
@@ -101,7 +101,8 @@ static void arm7_9_assign_wp(struct arm7_9_common *arm7_9, struct breakpoint *br
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arm7_9->wp_available--;
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} else
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LOG_ERROR("BUG: no hardware comparator available");
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LOG_DEBUG("BPID: %" PRId32 " (0x%08" PRIx32 ") using hw wp: %d",
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LOG_DEBUG("BPID: %" PRId32 " (0x%08" TARGET_PRIxADDR ") using hw wp: %d",
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breakpoint->unique_id,
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breakpoint->address,
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breakpoint->set);
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@@ -187,7 +188,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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int retval = ERROR_OK;
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LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32 ", Type: %d",
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LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR ", Type: %d",
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breakpoint->unique_id,
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breakpoint->address,
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breakpoint->type);
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@@ -244,7 +245,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
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if (retval != ERROR_OK)
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return retval;
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if (verify != arm7_9->arm_bkpt) {
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LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" PRIx32
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LOG_ERROR("Unable to set 32 bit software breakpoint at address %08" TARGET_PRIxADDR
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" - check that memory is read/writable", breakpoint->address);
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return ERROR_OK;
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}
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@@ -264,7 +265,7 @@ static int arm7_9_set_breakpoint(struct target *target, struct breakpoint *break
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if (retval != ERROR_OK)
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return retval;
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if (verify != arm7_9->thumb_bkpt) {
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LOG_ERROR("Unable to set thumb software breakpoint at address %08" PRIx32
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LOG_ERROR("Unable to set thumb software breakpoint at address %08" TARGET_PRIxADDR
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" - check that memory is read/writable", breakpoint->address);
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return ERROR_OK;
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}
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@@ -299,7 +300,7 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
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int retval = ERROR_OK;
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" PRIx32,
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LOG_DEBUG("BPID: %" PRId32 ", Address: 0x%08" TARGET_PRIxADDR,
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breakpoint->unique_id,
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breakpoint->address);
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@@ -1692,7 +1693,7 @@ static void arm7_9_enable_breakpoints(struct target *target)
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int arm7_9_resume(struct target *target,
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int current,
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uint32_t address,
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target_addr_t address,
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int handle_breakpoints,
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int debug_execution)
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{
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@@ -1724,7 +1725,7 @@ int arm7_9_resume(struct target *target,
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breakpoint = breakpoint_find(target,
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buf_get_u32(arm->pc->value, 0, 32));
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if (breakpoint != NULL) {
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LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %" PRId32,
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LOG_DEBUG("unset breakpoint at 0x%8.8" TARGET_PRIxADDR " (id: %" PRId32,
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breakpoint->address,
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breakpoint->unique_id);
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retval = arm7_9_unset_breakpoint(target, breakpoint);
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@@ -1783,7 +1784,7 @@ int arm7_9_resume(struct target *target,
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LOG_DEBUG("new PC after step: 0x%8.8" PRIx32,
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buf_get_u32(arm->pc->value, 0, 32));
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LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
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LOG_DEBUG("set breakpoint at 0x%8.8" TARGET_PRIxADDR "", breakpoint->address);
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retval = arm7_9_set_breakpoint(target, breakpoint);
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if (retval != ERROR_OK)
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return retval;
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@@ -1894,7 +1895,7 @@ void arm7_9_disable_eice_step(struct target *target)
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embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE]);
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}
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int arm7_9_step(struct target *target, int current, uint32_t address, int handle_breakpoints)
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int arm7_9_step(struct target *target, int current, target_addr_t address, int handle_breakpoints)
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{
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struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
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struct arm *arm = &arm7_9->arm;
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@@ -2094,7 +2095,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
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}
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int arm7_9_read_memory(struct target *target,
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uint32_t address,
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target_addr_t address,
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uint32_t size,
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uint32_t count,
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uint8_t *buffer)
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@@ -2109,7 +2110,7 @@ int arm7_9_read_memory(struct target *target,
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int retval;
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int last_reg = 0;
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LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
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LOG_DEBUG("address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "",
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address, size, count);
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if (target->state != TARGET_HALTED) {
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@@ -2247,7 +2248,8 @@ int arm7_9_read_memory(struct target *target,
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if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
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LOG_WARNING(
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"memory read caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
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"memory read caused data abort "
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"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
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address,
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size,
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count);
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@@ -2263,7 +2265,7 @@ int arm7_9_read_memory(struct target *target,
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}
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int arm7_9_write_memory(struct target *target,
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uint32_t address,
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target_addr_t address,
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uint32_t size,
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uint32_t count,
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const uint8_t *buffer)
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@@ -2460,7 +2462,8 @@ int arm7_9_write_memory(struct target *target,
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if (((cpsr & 0x1f) == ARM_MODE_ABT) && (arm->core_mode != ARM_MODE_ABT)) {
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LOG_WARNING(
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"memory write caused data abort (address: 0x%8.8" PRIx32 ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
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"memory write caused data abort "
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"(address: 0x%8.8" TARGET_PRIxADDR ", size: 0x%" PRIx32 ", count: 0x%" PRIx32 ")",
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address,
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size,
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count);
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@@ -2476,7 +2479,7 @@ int arm7_9_write_memory(struct target *target,
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}
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int arm7_9_write_memory_opt(struct target *target,
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uint32_t address,
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target_addr_t address,
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uint32_t size,
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uint32_t count,
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const uint8_t *buffer)
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@@ -2576,7 +2579,7 @@ static const uint32_t dcc_code[] = {
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};
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int arm7_9_bulk_write_memory(struct target *target,
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uint32_t address,
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target_addr_t address,
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uint32_t count,
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const uint8_t *buffer)
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{
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@@ -2632,7 +2635,7 @@ int arm7_9_bulk_write_memory(struct target *target,
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uint32_t endaddress = buf_get_u32(reg_params[0].value, 0, 32);
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if (endaddress != (address + count*4)) {
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LOG_ERROR(
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"DCC write failed, expected end address 0x%08" PRIx32 " got 0x%0" PRIx32 "",
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"DCC write failed, expected end address 0x%08" TARGET_PRIxADDR " got 0x%0" PRIx32 "",
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(address + count*4),
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endaddress);
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retval = ERROR_FAIL;
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