forked from auracaster/openocd
Remove BUILD_TARGET64
BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.
Rebased by Antonio Borneo after commit 1fbe8450a9 ("mips: Add
MIPS64 support")
Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
This commit is contained in:
committed by
Antonio Borneo
parent
5c8de6a725
commit
5c6e32612d
@@ -29,12 +29,9 @@ noinst_LTLIBRARIES += %D%/libtarget.la
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%D%/dsp563xx.c \
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%D%/dsp563xx_once.c \
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%D%/dsp5680xx.c \
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%D%/hla_target.c
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if TARGET64
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%C%_libtarget_la_SOURCES +=$(ARMV8_SRC)
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%C%_libtarget_la_SOURCES +=$(MIPS64_SRC)
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endif
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%D%/hla_target.c \
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$(ARMV8_SRC) \
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$(MIPS64_SRC)
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TARGET_CORE_SRC = \
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%D%/algorithm.c \
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@@ -62,12 +62,6 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va,
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/* decode memory attribute */
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SS = (value >> 1) & 1;
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#if !BUILD_TARGET64
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if (SS) {
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LOG_ERROR("Super section found with no-64 bit address support");
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return ERROR_FAIL;
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}
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#endif
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NOS = (value >> 10) & 1; /* Not Outer shareable */
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NS = (value >> 9) & 1; /* Non secure */
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INNER = (value >> 4) & 0x7;
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@@ -18,8 +18,6 @@
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#include "config.h"
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#endif
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#if BUILD_TARGET64 == 1
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#include "mips64.h"
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static const struct {
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@@ -623,5 +621,3 @@ int mips64_enable_interrupts(struct target *target, bool enable)
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return ERROR_OK;
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}
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#endif /* BUILD_TARGET64 */
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@@ -17,8 +17,6 @@
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#include "config.h"
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#endif
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#if BUILD_TARGET64 == 1
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#include "mips64.h"
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#include "mips64_pracc.h"
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@@ -1427,5 +1425,3 @@ int mips64_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info,
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return retval;
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}
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#endif /* BUILD_TARGET64 */
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@@ -27,11 +27,8 @@
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#include "mips32.h"
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#include "mips_ejtag.h"
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#include "mips32_dmaacc.h"
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#if BUILD_TARGET64 == 1
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#include "mips64.h"
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#include "mips64_pracc.h"
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#endif
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void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr)
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{
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@@ -458,8 +455,6 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_
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return ERROR_OK;
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}
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#if BUILD_TARGET64 == 1
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int mips64_ejtag_config_step(struct mips_ejtag *ejtag_info, bool enable_step)
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{
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const uint32_t code_enable[] = {
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@@ -564,5 +559,3 @@ int mips64_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, bool write_t, uint
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return ERROR_OK;
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}
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#endif /* BUILD_TARGET64 */
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@@ -16,8 +16,6 @@
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#include "config.h"
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#endif
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#if BUILD_TARGET64 == 1
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#include "breakpoints.h"
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#include "mips32.h"
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#include "mips64.h"
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@@ -1193,5 +1191,3 @@ struct target_type mips_mips64_target = {
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.commands = mips64_commands_handlers,
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};
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#endif /* BUILD_TARGET64 */
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@@ -1892,11 +1892,9 @@ static target_addr_t sb_read_address(struct target *target)
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target_addr_t address = 0;
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uint32_t v;
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if (sbasize > 32) {
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#if BUILD_TARGET64
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dmi_read(target, &v, DMI_SBADDRESS1);
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address |= v;
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address <<= 32;
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#endif
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}
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dmi_read(target, &v, DMI_SBADDRESS0);
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address |= v;
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@@ -1913,11 +1911,7 @@ static int sb_write_address(struct target *target, target_addr_t address)
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if (sbasize > 64)
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dmi_write(target, DMI_SBADDRESS2, 0);
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if (sbasize > 32)
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#if BUILD_TARGET64
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dmi_write(target, DMI_SBADDRESS1, address >> 32);
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#else
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dmi_write(target, DMI_SBADDRESS1, 0);
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#endif
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return dmi_write(target, DMI_SBADDRESS0, address);
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}
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@@ -148,10 +148,8 @@ static struct target_type *target_types[] = {
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&mem_ap_target,
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&esirisc_target,
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&arcv2_target,
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#if BUILD_TARGET64
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&aarch64_target,
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&mips_mips64_target,
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#endif
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NULL,
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};
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