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Remove BUILD_TARGET64

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BUILD_TARGET64 creates a larger test matrix and mostly gates the
building of the aarch64/armv8 target, make that unconditional, which
would help fixing any issues with 64-bit address types anyway.

Rebased by Antonio Borneo after commit 1fbe8450a9 ("mips: Add
MIPS64 support")

Change-Id: I219f62b744d540d9dde9a42e6b63fd7d91df3dbb
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5240
Tested-by: jenkins
This commit is contained in:
Florian Fainelli
2019-06-17 15:46:11 -07:00
committed by Antonio Borneo
parent 5c8de6a725
commit 5c6e32612d
10 changed files with 3 additions and 61 deletions
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6
src/target/riscv/riscv-013.c
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@@ -1892,11 +1892,9 @@ static target_addr_t sb_read_address(struct target *target)
target_addr_t address = 0;
uint32_t v;
if (sbasize > 32) {
#if BUILD_TARGET64
dmi_read(target, &v, DMI_SBADDRESS1);
address |= v;
address <<= 32;
#endif
}
dmi_read(target, &v, DMI_SBADDRESS0);
address |= v;
@@ -1913,11 +1911,7 @@ static int sb_write_address(struct target *target, target_addr_t address)
if (sbasize > 64)
dmi_write(target, DMI_SBADDRESS2, 0);
if (sbasize > 32)
#if BUILD_TARGET64
dmi_write(target, DMI_SBADDRESS1, address >> 32);
#else
dmi_write(target, DMI_SBADDRESS1, 0);
#endif
return dmi_write(target, DMI_SBADDRESS0, address);
}