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aarch64: fix software breakpoints when in aarch32 state

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Use the correct opcode for Aarch32 state, both for the breakpoint
instruction itself and the cache handling functions.

Change-Id: I975fa67b1e577b54f5c672a01d516419c6a614b2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3981
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Matthias Welwarsky
2016-10-26 17:32:43 +02:00
committed by Paul Fertser
parent 7c85165bc1
commit 5d00fd9d1d
5 changed files with 31 additions and 6 deletions
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5
src/target/armv8_opcodes.h
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@@ -148,6 +148,7 @@
#define ARMV8_BKPT(Im) (0xD4200000 | ((Im & 0xffff) << 5))
#define ARMV8_HLT(Im) (0x0D4400000 | ((Im & 0xffff) << 5))
#define ARMV8_HLT_A1(Im) (0xE1000070 | ((Im & 0xFFF0) << 4) | (Im & 0xF))
#define ARMV8_MOVFSP_64(Rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (Rt))
#define ARMV8_MOVTSP_64(Rt) ((1 << 31) | 0x11000000 | (Rt << 5) | (0x1F))
@@ -171,6 +172,10 @@ enum armv8_opcode {
ARMV8_OPC_DCPS,
ARMV8_OPC_DRPS,
ARMV8_OPC_ISB_SY,
ARMV8_OPC_DCCISW,
ARMV8_OPC_DCCIVAC,
ARMV8_OPC_ICIVAU,
ARMV8_OPC_HLT,
ARMV8_OPC_NUM,
};