diff --git a/tcl/target/gd32vf103.cfg b/tcl/target/gd32vf103.cfg
index 54a74e8cc..5941dc66d 100644
--- a/tcl/target/gd32vf103.cfg
+++ b/tcl/target/gd32vf103.cfg
@@ -23,11 +23,20 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x1800
 }
 
+# Example OpenOCD configurations from GigaDevice/Nuclei expect a cpu IDCODE of
+# 0x1e200a6d instead. It's unclear if any units with that IDCODE exist in the
+# wild. Please report a bug if you have such a unit.
 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id 0x790007a3
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME riscv -chain-position $_TARGETNAME
 
+# Disable virtual address translation since we don't have an MMU. Nothing will
+# break without this line, but OpenOCD will do a few unnecessary register reads
+# to figure it out on its own.
+$_TARGETNAME riscv virt2phys_mode off
+
 proc default_mem_access {} {
 	riscv set_mem_access progbuf
 }