target/cortex_m: allow setting the type of a breakpoint

Cortex-M target used 'auto_bp_type' mode. The requested type
of breakpoint was ignored and hard (FPB) breakpoints were set in
'code memory area' 0x00000000-0x1fffffff, soft breakpoints were set above
0x20000000.

The code memory area of Cortex-M does not mean the memory is flash and
vice versa. External flash (parallel or QSPI) is usually mapped above
code memory area. Cortex-M7 ITCM RAM is mapped at 0. Kinetis
has a RAM block under 0x20000000 boundary.

Remove 'auto_bp_type' mode, set breakpoints to requested type.

Change 'cortex_m maskisr auto' handling to use a hard temporary
breakpoint everywhere: it can also workaround not working soft breakpoints
on Cortex-M7 with ICache enabled.

Change-Id: I7a9f9464c5e10bfd7f17cba1037ed07a064fa2e8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4429
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This commit is contained in:
Tomas Vanek
2018-02-23 00:12:50 +01:00
committed by Matthias Welwarsky
parent 09076d10dd
commit 81d0b769a6
3 changed files with 5 additions and 32 deletions

View File

@@ -175,7 +175,6 @@ struct cortex_m_common {
int fp_code_available;
int fp_rev;
int fpb_enabled;
int auto_bp_type;
struct cortex_m_fp_comparator *fp_comparator_list;
/* Data Watchpoint and Trace (DWT) */