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target: cortex_m: add support of ARMv8.1-M register 'vpr'

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The register 'vpr' is present when MVFR1.MVE is not zero.
For the moment, reuse the existing flag 'fp_feature'. To be
reviewed for the case of MVE supported without floating point.

The documentation of GDB [1] reports that the register 'vpr'
should be represented as 3 fields.

Tested on Cortex-M55 based STM32N6570.

Change-Id: I8737a24d01a13eeb09a0f2075b96be400f9f91c6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Link: [1] https://sourceware.org/gdb/download/onlinedocs/gdb.html/ARM-Features.html#M_002dprofile-Vector-Extension-_0028MVE_0029
Reviewed-on: https://review.openocd.org/c/openocd/+/8681
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2024-12-30 12:14:24 +01:00
parent 41f7d18161
commit 8e89a8af63
3 changed files with 36 additions and 1 deletions
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6
src/target/armv7m.h
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@@ -62,6 +62,7 @@ enum {
ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL = 0x14,
ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_S = 0x22,
ARMV8M_REGSEL_PMSK_BPRI_FLTMSK_CTRL_NS = 0x23,
ARMV8M_REGSEL_VPR = 0x24,
ARMV7M_REGSEL_FPSCR = 0x21,
/* 32bit Floating-point registers */
@@ -196,12 +197,15 @@ enum {
/* Floating-point status register */
ARMV7M_FPSCR,
/* Vector Predication Status and Control Register */
ARMV8M_VPR,
/* for convenience add registers' block delimiters */
ARMV7M_LAST_REG,
ARMV7M_CORE_FIRST_REG = ARMV7M_R0,
ARMV7M_CORE_LAST_REG = ARMV7M_XPSR,
ARMV7M_FPU_FIRST_REG = ARMV7M_D0,
ARMV7M_FPU_LAST_REG = ARMV7M_FPSCR,
ARMV7M_FPU_LAST_REG = ARMV8M_VPR,
ARMV8M_FIRST_REG = ARMV8M_MSP_NS,
ARMV8M_LAST_REG = ARMV8M_CONTROL_NS,
};