forked from auracaster/openocd
target/xtensa: add NX support
- Manual integration of NX support from xt0.2 release - No new clang static analysis warnings Signed-off-by: Ian Thompson <ianst@cadence.com> Change-Id: I95b51ccc83e56c0d4dbf09e01969ed6a4a93d497 Reviewed-on: https://review.openocd.org/c/openocd/+/7356 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
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Antonio Borneo
parent
047b1a8fc2
commit
904d58c208
@@ -246,6 +246,7 @@ struct xtensa_dm_reg_offsets {
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#define OCDDCR_ENABLEOCD BIT(0)
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#define OCDDCR_DEBUGINTERRUPT BIT(1)
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#define OCDDCR_INTERRUPTALLCONDS BIT(2)
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#define OCDDCR_STEPREQUEST BIT(3) /* NX only */
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#define OCDDCR_BREAKINEN BIT(16)
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#define OCDDCR_BREAKOUTEN BIT(17)
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#define OCDDCR_DEBUGSWACTIVE BIT(20)
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@@ -259,6 +260,8 @@ struct xtensa_dm_reg_offsets {
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#define OCDDSR_EXECBUSY BIT(2)
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#define OCDDSR_EXECOVERRUN BIT(3)
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#define OCDDSR_STOPPED BIT(4)
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#define OCDDSR_STOPCAUSE (0xF << 5) /* NX only */
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#define OCDDSR_STOPCAUSE_SHIFT (5) /* NX only */
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#define OCDDSR_COREWROTEDDR BIT(10)
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#define OCDDSR_COREREADDDR BIT(11)
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#define OCDDSR_HOSTWROTEDDR BIT(14)
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@@ -275,12 +278,24 @@ struct xtensa_dm_reg_offsets {
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#define OCDDSR_BREAKINITI BIT(26)
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#define OCDDSR_DBGMODPOWERON BIT(31)
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/* NX stop cause */
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#define OCDDSR_STOPCAUSE_DI (0) /* Debug Interrupt */
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#define OCDDSR_STOPCAUSE_SS (1) /* Single-step completed */
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#define OCDDSR_STOPCAUSE_IB (2) /* HW breakpoint (IBREAKn match) */
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#define OCDDSR_STOPCAUSE_B1 (4) /* SW breakpoint (BREAK.1 instruction) */
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#define OCDDSR_STOPCAUSE_BN (5) /* SW breakpoint (BREAK.N instruction) */
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#define OCDDSR_STOPCAUSE_B (6) /* SW breakpoint (BREAK instruction) */
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#define OCDDSR_STOPCAUSE_DB0 (8) /* HW watchpoint (DBREAK0 match) */
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#define OCDDSR_STOPCAUSE_DB1 (9) /* HW watchpoint (DBREAK0 match) */
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/* LX stop cause */
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#define DEBUGCAUSE_IC BIT(0) /* ICOUNT exception */
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#define DEBUGCAUSE_IB BIT(1) /* IBREAK exception */
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#define DEBUGCAUSE_DB BIT(2) /* DBREAK exception */
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#define DEBUGCAUSE_BI BIT(3) /* BREAK instruction encountered */
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#define DEBUGCAUSE_BN BIT(4) /* BREAK.N instruction encountered */
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#define DEBUGCAUSE_DI BIT(5) /* Debug Interrupt */
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#define DEBUGCAUSE_VALID BIT(31) /* Pseudo-value to trigger reread (NX only) */
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#define TRAXCTRL_TREN BIT(0) /* Trace enable. Tracing starts on 0->1 */
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#define TRAXCTRL_TRSTP BIT(1) /* Trace Stop. Make 1 to stop trace. */
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