forked from auracaster/openocd
target/dsp5680xx: cleanup retval usage
Reduce unnecessary assignment to retval. Change-Id: I98aad2d4c09c81e41a3efb639b0470cc663f5bd8 Signed-off-by: Mark O'Donovan <shiftee@posteo.net> Reviewed-on: https://review.openocd.org/c/openocd/+/9550 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
committed by
Antonio Borneo
parent
ea07cc74ce
commit
944fb35b70
@@ -25,8 +25,7 @@ static struct dsp5680xx_common dsp5680xx_context;
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static int dsp5680xx_execute_queue(void)
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{
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int retval = jtag_execute_queue();
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return retval;
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return jtag_execute_queue();
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}
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/**
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@@ -46,8 +45,7 @@ static int reset_jtag(void)
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if (retval != ERROR_OK)
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return retval;
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jtag_add_pathmove(0, states + 1);
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retval = jtag_execute_queue();
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return retval;
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return jtag_execute_queue();
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}
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static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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@@ -64,8 +62,6 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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*
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*-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*/
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int retval = ERROR_OK;
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if (!target->tap) {
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err_log(DSP5680XX_ERROR_JTAG_INVALID_TAP, "Invalid tap");
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return ERROR_FAIL;
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@@ -80,7 +76,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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/* is the casting necessary? */
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jtag_add_plain_dr_scan(len, d_in, d_out, TAP_IDLE);
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if (dsp5680xx_context.flush) {
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retval = dsp5680xx_execute_queue();
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int retval = dsp5680xx_execute_queue();
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if (retval != ERROR_OK) {
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err_log(DSP5680XX_ERROR_JTAG_DRSCAN, "drscan failed!");
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return retval;
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@@ -90,7 +86,7 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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LOG_DEBUG("Data read (%d bits): 0x%04X", len, *d_out);
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else
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LOG_DEBUG("Data read was discarded.");
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -105,8 +101,6 @@ static int dsp5680xx_drscan(struct target *target, uint8_t *d_in,
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static int dsp5680xx_irscan(struct target *target, uint32_t *d_in,
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uint32_t *d_out, uint8_t ir_len)
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{
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int retval = ERROR_OK;
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uint16_t tap_ir_len = DSP5680XX_JTAG_MASTER_TAP_IRLEN;
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if (!target || !target->tap) {
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@@ -130,13 +124,13 @@ static int dsp5680xx_irscan(struct target *target, uint32_t *d_in,
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jtag_add_plain_ir_scan(ir_len, (uint8_t *) d_in, (uint8_t *) d_out,
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TAP_IDLE);
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if (dsp5680xx_context.flush) {
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retval = dsp5680xx_execute_queue();
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int retval = dsp5680xx_execute_queue();
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if (retval != ERROR_OK) {
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err_log(DSP5680XX_ERROR_JTAG_IRSCAN, "irscan failed!");
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return retval;
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}
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}
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return retval;
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return ERROR_OK;
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}
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static int dsp5680xx_jtag_status(struct target *target, uint8_t *status)
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@@ -184,7 +178,7 @@ static int jtag_data_write(struct target *target, uint32_t instr, int num_bits,
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return retval;
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if (data_read)
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*data_read = data_read_dummy;
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return retval;
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return ERROR_OK;
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}
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#define jtag_data_write8(target, instr, data_read) jtag_data_write(target, instr, 8, data_read)
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@@ -217,7 +211,7 @@ static int eonce_instruction_exec_single(struct target *target, uint8_t instr,
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return retval;
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if (eonce_status)
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*eonce_status = (uint8_t) dr_out_tmp;
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return retval;
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return ERROR_OK;
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}
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/* wrappers for multi opcode instructions */
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@@ -232,8 +226,7 @@ static int dsp5680xx_exe1(struct target *target, uint16_t opcode)
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int retval = eonce_instruction_exec_single(target, 0x04, 0, 1, 0, NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_write16(target, opcode, NULL);
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return retval;
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return jtag_data_write16(target, opcode, NULL);
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}
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/* Executes two word DSP instruction */
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@@ -249,8 +242,7 @@ static int dsp5680xx_exe2(struct target *target, uint16_t opcode1,
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retval = eonce_instruction_exec_single(target, 0x04, 0, 1, 0, NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_write16(target, opcode2, NULL);
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return retval;
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return jtag_data_write16(target, opcode2, NULL);
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}
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/* Executes three word DSP instruction */
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@@ -272,8 +264,7 @@ static int dsp5680xx_exe3(struct target *target, uint16_t opcode1,
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retval = eonce_instruction_exec_single(target, 0x04, 0, 1, 0, NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_write16(target, opcode3, NULL);
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return retval;
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return jtag_data_write16(target, opcode3, NULL);
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}
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/*
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@@ -297,8 +288,7 @@ static int core_tx_upper_data(struct target *target, uint16_t data,
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NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_write16(target, data, eonce_status_low);
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return retval;
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return jtag_data_write16(target, data, eonce_status_low);
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}
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/* writes data into lower ORx register of the target */
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@@ -319,8 +309,7 @@ static int core_rx_upper_data(struct target *target, uint8_t *data_read)
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NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_read16(target, data_read);
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return retval;
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return jtag_data_read16(target, data_read);
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}
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/**
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@@ -336,8 +325,7 @@ static int core_rx_lower_data(struct target *target, uint8_t *data_read)
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NULL);
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if (retval != ERROR_OK)
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return retval;
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retval = jtag_data_read16(target, data_read);
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return retval;
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return jtag_data_read16(target, data_read);
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}
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/*
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@@ -470,28 +458,22 @@ static int core_move_value_to_pc(struct target *target, uint32_t value)
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return ERROR_FAIL;
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}
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int retval =
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dsp5680xx_exe_generic(target, 3, 0xE71E, value & 0xffff,
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return dsp5680xx_exe_generic(target, 3, 0xE71E, value & 0xffff,
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value >> 16);
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return retval;
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}
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static int eonce_load_tx_rx_to_r0(struct target *target)
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{
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int retval =
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core_move_long_to_r0(target,
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return core_move_long_to_r0(target,
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((MC568013_EONCE_TX_RX_ADDR) +
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(MC568013_EONCE_OBASE_ADDR << 16)));
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return retval;
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}
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static int core_load_tx_rx_high_addr_to_r0(struct target *target)
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{
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int retval =
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core_move_long_to_r0(target,
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return core_move_long_to_r0(target,
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((MC568013_EONCE_TX1_RX1_HIGH_ADDR) +
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(MC568013_EONCE_OBASE_ADDR << 16)));
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return retval;
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}
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static int dsp5680xx_read_core_reg(struct target *target, uint8_t reg_addr,
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@@ -509,13 +491,12 @@ static int dsp5680xx_read_core_reg(struct target *target, uint8_t reg_addr,
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("Reg. data: 0x%02X.", *data_read);
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return retval;
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return ERROR_OK;
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}
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static int eonce_read_status_reg(struct target *target, uint16_t *data)
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{
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int retval = dsp5680xx_read_core_reg(target, DSP5680XX_ONCE_OSR, data);
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return retval;
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return dsp5680xx_read_core_reg(target, DSP5680XX_ONCE_OSR, data);
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}
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/**
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@@ -528,9 +509,7 @@ static int eonce_read_status_reg(struct target *target, uint16_t *data)
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*/
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static int eonce_exit_debug_mode(struct target *target, uint8_t *eonce_status)
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{
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int retval =
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eonce_instruction_exec_single(target, 0x1F, 0, 0, 1, eonce_status);
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return retval;
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return eonce_instruction_exec_single(target, 0x1F, 0, 0, 1, eonce_status);
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}
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static int switch_tap(struct target *target, struct jtag_tap *master_tap,
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@@ -597,7 +576,7 @@ static int switch_tap(struct target *target, struct jtag_tap *master_tap,
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core_tap->enabled = false;
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master_tap->enabled = true;
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}
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -655,7 +634,6 @@ static int eonce_enter_debug_mode_without_reset(struct target *target,
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if ((data_read_from_dr & 0x30) == 0x30) {
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LOG_DEBUG("EOnCE successfully entered debug mode.");
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dsp5680xx_context.debug_mode_enabled = true;
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retval = ERROR_OK;
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} else {
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dsp5680xx_context.debug_mode_enabled = false;
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/**
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@@ -665,7 +643,7 @@ static int eonce_enter_debug_mode_without_reset(struct target *target,
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}
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if (eonce_status)
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*eonce_status = data_read_from_dr;
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -796,7 +774,6 @@ static int eonce_enter_debug_mode(struct target *target,
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if ((data_read_from_dr & 0x30) == 0x30) {
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LOG_DEBUG("EOnCE successfully entered debug mode.");
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dsp5680xx_context.debug_mode_enabled = true;
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retval = ERROR_OK;
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} else {
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const char *msg = "Failed to set EOnCE module to debug mode";
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@@ -805,7 +782,7 @@ static int eonce_enter_debug_mode(struct target *target,
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}
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if (eonce_status)
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*eonce_status = data_read_from_dr;
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -1102,7 +1079,7 @@ static int dsp5680xx_read_16_single(struct target *t, uint32_t a,
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return retval;
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LOG_DEBUG("%s:Data read from 0x%06" PRIX32 ": 0x%02X%02X", __func__, address,
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data_read[1], data_read[0]);
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return retval;
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return ERROR_OK;
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}
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static int dsp5680xx_read_32_single(struct target *t, uint32_t a,
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@@ -1147,8 +1124,7 @@ static int dsp5680xx_read_32_single(struct target *t, uint32_t a,
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retval = core_rx_lower_data(target, data_read);
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if (retval != ERROR_OK)
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return retval;
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retval = core_rx_upper_data(target, data_read + 2);
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return retval;
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return core_rx_upper_data(target, data_read + 2);
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}
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static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size,
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@@ -1211,9 +1187,7 @@ static int dsp5680xx_read(struct target *t, target_addr_t a, uint32_t size,
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}
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dsp5680xx_context.flush = 1;
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retval = dsp5680xx_execute_queue();
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return retval;
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return dsp5680xx_execute_queue();
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}
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static int dsp5680xx_write_16_single(struct target *t, uint32_t a,
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@@ -1231,12 +1205,8 @@ static int dsp5680xx_write_16_single(struct target *t, uint32_t a,
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if (retval != ERROR_OK)
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return retval;
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retval = core_move_y0_at_pr0_inc(target);
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if (retval != ERROR_OK)
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return retval;
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} else {
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retval = core_move_value_at_r0(target, data);
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if (retval != ERROR_OK)
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return retval;
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}
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return retval;
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}
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@@ -1338,8 +1308,6 @@ static int dsp5680xx_write_16(struct target *t, uint32_t a, uint32_t c,
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const uint8_t *data = d;
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int retval = ERROR_OK;
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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@@ -1349,7 +1317,7 @@ static int dsp5680xx_write_16(struct target *t, uint32_t a, uint32_t c,
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dsp5680xx_context.flush = 1;
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counter = FLUSH_COUNT_READ_WRITE;
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}
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retval =
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int retval =
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dsp5680xx_write_16_single(target, address + iter,
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data[iter], pmem);
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if (retval != ERROR_OK) {
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@@ -1361,7 +1329,7 @@ static int dsp5680xx_write_16(struct target *t, uint32_t a, uint32_t c,
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dsp5680xx_context.flush = 0;
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}
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dsp5680xx_context.flush = 1;
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return retval;
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return ERROR_OK;
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}
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static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
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@@ -1375,8 +1343,6 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
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const uint8_t *data = d;
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int retval = ERROR_OK;
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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@@ -1386,7 +1352,7 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
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dsp5680xx_context.flush = 1;
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counter = FLUSH_COUNT_READ_WRITE;
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}
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retval =
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int retval =
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dsp5680xx_write_32_single(target, address + (iter << 1),
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data[iter], pmem);
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if (retval != ERROR_OK) {
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@@ -1398,7 +1364,7 @@ static int dsp5680xx_write_32(struct target *t, uint32_t a, uint32_t c,
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dsp5680xx_context.flush = 0;
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}
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dsp5680xx_context.flush = 1;
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -1561,21 +1527,14 @@ static int perl_crc(const uint8_t *buff8, uint32_t word_count)
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*/
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static int dsp5680xx_f_sim_reset(struct target *target)
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{
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int retval = ERROR_OK;
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uint16_t sim_cmd = SIM_CMD_RESET;
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uint32_t sim_addr;
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if (strcmp(target->tap->chip, "dsp568013") == 0) {
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sim_addr = MC568013_SIM_BASE_ADDR + S_FILE_DATA_OFFSET;
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retval =
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dsp5680xx_write(target, sim_addr, 1, 2,
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uint32_t sim_addr = MC568013_SIM_BASE_ADDR + S_FILE_DATA_OFFSET;
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return dsp5680xx_write(target, sim_addr, 1, 2,
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(const uint8_t *)&sim_cmd);
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if (retval != ERROR_OK)
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return retval;
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}
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return retval;
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return ERROR_OK;
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}
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/**
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@@ -1591,8 +1550,7 @@ static int dsp5680xx_soft_reset_halt(struct target *target)
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int retval = dsp5680xx_halt(target);
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if (retval != ERROR_OK)
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return retval;
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retval = dsp5680xx_f_sim_reset(target);
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return retval;
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return dsp5680xx_f_sim_reset(target);
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}
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int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
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@@ -1611,10 +1569,8 @@ int dsp5680xx_f_protect_check(struct target *target, uint16_t *protected)
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err_log(DSP5680XX_ERROR_PROTECT_CHECK_INVALID_ARGS, msg);
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return ERROR_FAIL;
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}
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int retval =
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dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_PROT,
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return dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_PROT,
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(uint8_t *) protected, 0);
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return retval;
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}
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/**
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@@ -1847,10 +1803,8 @@ static int dsp5680xx_f_signature(struct target *target, uint32_t address, uint32
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&hfm_ustat, 1);
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if (retval != ERROR_OK)
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return retval;
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retval =
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dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_DATA,
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return dsp5680xx_read_16_single(target, HFM_BASE_ADDR | HFM_DATA,
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(uint8_t *) signature, 0);
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return retval;
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}
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int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased,
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@@ -1880,7 +1834,7 @@ int dsp5680xx_f_erase_check(struct target *target, uint8_t *erased,
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return retval;
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if (erased)
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*erased = (uint8_t) (hfm_ustat & HFM_USTAT_MASK_BLANK);
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return retval;
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return ERROR_OK;
|
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}
|
||||
|
||||
/**
|
||||
@@ -1896,8 +1850,7 @@ static int erase_sector(struct target *target, int sector, uint16_t *hfm_ustat)
|
||||
{
|
||||
uint32_t tmp = HFM_FLASH_BASE_ADDR + sector * HFM_SECTOR_SIZE / 2;
|
||||
|
||||
int retval = dsp5680xx_f_ex(target, HFM_PAGE_ERASE, tmp, 0, hfm_ustat, 1);
|
||||
return retval;
|
||||
return dsp5680xx_f_ex(target, HFM_PAGE_ERASE, tmp, 0, hfm_ustat, 1);
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -1910,8 +1863,7 @@ static int erase_sector(struct target *target, int sector, uint16_t *hfm_ustat)
|
||||
*/
|
||||
static int mass_erase(struct target *target, uint16_t *hfm_ustat)
|
||||
{
|
||||
int retval = dsp5680xx_f_ex(target, HFM_MASS_ERASE, 0, 0, hfm_ustat, 1);
|
||||
return retval;
|
||||
return dsp5680xx_f_ex(target, HFM_MASS_ERASE, 0, 0, hfm_ustat, 1);
|
||||
}
|
||||
|
||||
int dsp5680xx_f_erase(struct target *target, int first, int last)
|
||||
@@ -2272,7 +2224,7 @@ int dsp5680xx_f_unlock(struct target *target)
|
||||
tap_chp->enabled = false;
|
||||
target->state = TARGET_RUNNING;
|
||||
dsp5680xx_context.debug_mode_enabled = false;
|
||||
return retval;
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int dsp5680xx_f_lock(struct target *target)
|
||||
@@ -2311,8 +2263,7 @@ int dsp5680xx_f_lock(struct target *target)
|
||||
dsp5680xx_context.debug_mode_enabled = false;
|
||||
tap_cpu->enabled = false;
|
||||
tap_chp->enabled = true;
|
||||
retval = switch_tap(target, tap_chp, tap_cpu);
|
||||
return retval;
|
||||
return switch_tap(target, tap_chp, tap_cpu);
|
||||
}
|
||||
|
||||
static int dsp5680xx_step(struct target *target, bool current, target_addr_t address,
|
||||
|
||||
Reference in New Issue
Block a user