forked from auracaster/openocd
openocd: drop iteration downsampling for keep_alive()
The function keep_alive() is optimized and return immediately if has nothing to do. There is no need to overly-complicate the code with extra counters or time computation plus the relative checks to reduce the number of calls to keep_alive(). Drop such extra code. Change-Id: I4574a3f154b5779f44105936c74af8fca1d2c49c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/9064 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Lucien Buchmann <lucien.buchmann@dufour.aero>
This commit is contained in:
@@ -151,9 +151,8 @@ int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt,
|
||||
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
|
||||
uint32_t linelen = armv7a_cache->dminline;
|
||||
uint32_t va_line, va_end;
|
||||
int retval, i = 0;
|
||||
|
||||
retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
int retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -185,8 +184,7 @@ int armv7a_l1_d_cache_inval_virt(struct target *target, uint32_t virt,
|
||||
}
|
||||
|
||||
while (va_line < va_end) {
|
||||
if ((i++ & 0x3f) == 0)
|
||||
keep_alive();
|
||||
keep_alive();
|
||||
/* DCIMVAC - Invalidate data cache line by VA to PoC. */
|
||||
retval = dpm->instr_write_data_r0(dpm,
|
||||
ARMV4_5_MCR(15, 0, 0, 7, 6, 1), va_line);
|
||||
@@ -215,9 +213,8 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt,
|
||||
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
|
||||
uint32_t linelen = armv7a_cache->dminline;
|
||||
uint32_t va_line, va_end;
|
||||
int retval, i = 0;
|
||||
|
||||
retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
int retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -229,8 +226,7 @@ int armv7a_l1_d_cache_clean_virt(struct target *target, uint32_t virt,
|
||||
va_end = virt + size;
|
||||
|
||||
while (va_line < va_end) {
|
||||
if ((i++ & 0x3f) == 0)
|
||||
keep_alive();
|
||||
keep_alive();
|
||||
/* DCCMVAC - Data Cache Clean by MVA to PoC */
|
||||
retval = dpm->instr_write_data_r0(dpm,
|
||||
ARMV4_5_MCR(15, 0, 0, 7, 10, 1), va_line);
|
||||
@@ -259,9 +255,8 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
|
||||
struct armv7a_cache_common *armv7a_cache = &armv7a->armv7a_mmu.armv7a_cache;
|
||||
uint32_t linelen = armv7a_cache->dminline;
|
||||
uint32_t va_line, va_end;
|
||||
int retval, i = 0;
|
||||
|
||||
retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
int retval = armv7a_l1_d_cache_sanity_check(target);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -273,8 +268,7 @@ int armv7a_l1_d_cache_flush_virt(struct target *target, uint32_t virt,
|
||||
va_end = virt + size;
|
||||
|
||||
while (va_line < va_end) {
|
||||
if ((i++ & 0x3f) == 0)
|
||||
keep_alive();
|
||||
keep_alive();
|
||||
/* DCCIMVAC */
|
||||
retval = dpm->instr_write_data_r0(dpm,
|
||||
ARMV4_5_MCR(15, 0, 0, 7, 14, 1), va_line);
|
||||
@@ -341,9 +335,8 @@ int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
|
||||
&armv7a->armv7a_mmu.armv7a_cache;
|
||||
uint32_t linelen = armv7a_cache->iminline;
|
||||
uint32_t va_line, va_end;
|
||||
int retval, i = 0;
|
||||
|
||||
retval = armv7a_l1_i_cache_sanity_check(target);
|
||||
int retval = armv7a_l1_i_cache_sanity_check(target);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
@@ -355,8 +348,7 @@ int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
|
||||
va_end = virt + size;
|
||||
|
||||
while (va_line < va_end) {
|
||||
if ((i++ & 0x3f) == 0)
|
||||
keep_alive();
|
||||
keep_alive();
|
||||
/* ICIMVAU - Invalidate instruction cache by VA to PoU. */
|
||||
retval = dpm->instr_write_data_r0(dpm,
|
||||
ARMV4_5_MCR(15, 0, 0, 7, 5, 1), va_line);
|
||||
|
||||
Reference in New Issue
Block a user