forked from auracaster/openocd
quark: add Intel Quark mcu D2000 support
Add support for the Intel Quark mcu D2000 using the new quark_d2xx target. Changes to the lakemont part are needed for the D2000 core and backwards compatible with the X1000 one. Change-Id: I6e1ef5a5d116344942f08e413965abd3945235fa Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com> Reviewed-on: http://openocd.zylin.com/3199 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This commit is contained in:
committed by
Andreas Fritiofson
parent
3e07e1cdfa
commit
a4ce9a2c71
112
src/target/quark_d20xx.c
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112
src/target/quark_d20xx.c
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/*
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* Copyright(c) 2015-2016 Intel Corporation.
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*
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* Jessica Gomez (jessica.gomez.hernandez@intel.com)
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* Ivan De Cesaris (ivan.de.cesaris@intel.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* Contact Information:
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* Intel Corporation
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*/
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/*
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* @file
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* Debugger for Intel Quark D20xx
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* The CPU TAP (Lakemont TAP) is used for software debug and the CLTAP is
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* used for SoC level operations.
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*
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* Reference document:
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* Intel Quark microcontroller D2000 Debug Operations (web search for doc num 333241)
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <helper/log.h>
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#include "target.h"
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#include "target_type.h"
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#include "breakpoints.h"
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#include "lakemont.h"
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#include "x86_32_common.h"
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int quark_d20xx_target_create(struct target *t, Jim_Interp *interp)
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{
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struct x86_32_common *x86_32 = calloc(1, sizeof(struct x86_32_common));
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if (x86_32 == NULL) {
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LOG_ERROR("%s out of memory", __func__);
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return ERROR_FAIL;
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}
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x86_32_common_init_arch_info(t, x86_32);
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lakemont_init_arch_info(t, x86_32);
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x86_32->core_type = LMT3_5;
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return ERROR_OK;
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}
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int quark_d20xx_init_target(struct command_context *cmd_ctx, struct target *t)
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{
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return lakemont_init_target(cmd_ctx, t);
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}
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static int quark_d20xx_reset_deassert(struct target *t)
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{
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int retval;
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/* Can't detect if a warm reset happened while halted but we can make the
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* openocd and target state consistent here if in probe mode already
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*/
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if (!check_not_halted(t)) {
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retval = lakemont_update_after_probemode_entry(t);
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if (retval != ERROR_OK) {
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LOG_ERROR("%s core state update fail", __func__);
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return retval;
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}
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/* resume target if reset mode is run */
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if (!t->reset_halt) {
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retval = lakemont_resume(t, 1, 0, 0, 0);
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if (retval != ERROR_OK) {
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LOG_ERROR("%s could not resume target", __func__);
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return retval;
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}
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}
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}
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return ERROR_OK;
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}
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struct target_type quark_d20xx_target = {
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.name = "quark_d20xx",
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.target_create = quark_d20xx_target_create,
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.init_target = quark_d20xx_init_target,
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/* lakemont probemode specific code */
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.poll = lakemont_poll,
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.arch_state = lakemont_arch_state,
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.halt = lakemont_halt,
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.resume = lakemont_resume,
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.step = lakemont_step,
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.assert_reset = lakemont_reset_assert,
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.deassert_reset = quark_d20xx_reset_deassert,
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/* common x86 code */
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.commands = x86_32_command_handlers,
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.get_gdb_reg_list = x86_32_get_gdb_reg_list,
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.read_memory = x86_32_common_read_memory,
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.write_memory = x86_32_common_write_memory,
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.add_breakpoint = x86_32_common_add_breakpoint,
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.remove_breakpoint = x86_32_common_remove_breakpoint,
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.add_watchpoint = x86_32_common_add_watchpoint,
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.remove_watchpoint = x86_32_common_remove_watchpoint,
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.virt2phys = x86_32_common_virt2phys,
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.read_phys_memory = x86_32_common_read_phys_mem,
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.write_phys_memory = x86_32_common_write_phys_mem,
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.mmu = x86_32_common_mmu,
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};
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