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target/adiv5: Large Physical Address Extension

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Provides ARM LPAE support to allow 64-bit TAR setting
on MEM AP accesses.

Tested on a 4-core ARM ARES Processor system using an
AXI Access Port.

Change-Id: I88f7a0a57a6abb58665032929194a41dd8729f6b
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-on: http://openocd.zylin.com/5576
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Kevin Burke
2021-02-09 17:27:03 -05:00
committed by Antonio Borneo
parent 920cacd74c
commit ac22cdc573
7 changed files with 168 additions and 74 deletions
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44
src/target/arm_adi_v5.h
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@@ -31,6 +31,7 @@
#include <helper/list.h>
#include "arm_jtag.h"
#include "helper/bits.h"
/* three-bit ACK values for SWD access (sent LSB first) */
#define SWD_ACK_OK 0x1
@@ -149,6 +150,10 @@
/* APB: initial value of csw_default */
#define CSW_APB_DEFAULT (CSW_DBGSWENABLE)
/* Fields of the MEM-AP's CFG register */
#define MEM_AP_REG_CFG_BE BIT(0)
#define MEM_AP_REG_CFG_LA BIT(1)
#define MEM_AP_REG_CFG_LD BIT(2)
/* Fields of the MEM-AP's IDR register */
#define IDR_REV (0xFUL << 28)
@@ -201,7 +206,7 @@ struct adiv5_ap {
* configure the address being read or written
* "-1" indicates no cached value.
*/
uint32_t tar_value;
target_addr_t tar_value;
/**
* Configures how many extra tck clocks are added after starting a
@@ -220,6 +225,9 @@ struct adiv5_ap {
/* true if tar_value is in sync with TAR register */
bool tar_valid;
/* MEM AP configuration register indicating LPAE support */
uint32_t cfg_reg;
};
@@ -359,6 +367,20 @@ enum ap_type {
AP_TYPE_AHB5_AP = 0x5, /* AHB5 Memory-AP. */
};
/* Check the ap->cfg_reg Long Address field (bit 1)
*
* 0b0: The AP only supports physical addresses 32 bits or smaller
* 0b1: The AP supports physical addresses larger than 32 bits
*
* @param ap The AP used for reading.
*
* @return true for 64 bit, false for 32 bit
*/
static inline bool is_64bit_ap(struct adiv5_ap *ap)
{
return (ap->cfg_reg & MEM_AP_REG_CFG_LA) != 0;
}
/**
* Send an adi-v5 sequence to the DAP.
*
@@ -528,27 +550,27 @@ static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned reg,
/* Queued MEM-AP memory mapped single word transfers. */
int mem_ap_read_u32(struct adiv5_ap *ap,
uint32_t address, uint32_t *value);
target_addr_t address, uint32_t *value);
int mem_ap_write_u32(struct adiv5_ap *ap,
uint32_t address, uint32_t value);
target_addr_t address, uint32_t value);
/* Synchronous MEM-AP memory mapped single word transfers. */
int mem_ap_read_atomic_u32(struct adiv5_ap *ap,
uint32_t address, uint32_t *value);
target_addr_t address, uint32_t *value);
int mem_ap_write_atomic_u32(struct adiv5_ap *ap,
uint32_t address, uint32_t value);
target_addr_t address, uint32_t value);
/* Synchronous MEM-AP memory mapped bus block transfers. */
int mem_ap_read_buf(struct adiv5_ap *ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address);
int mem_ap_write_buf(struct adiv5_ap *ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address);
/* Synchronous, non-incrementing buffer functions for accessing fifos. */
int mem_ap_read_buf_noincr(struct adiv5_ap *ap,
uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address);
int mem_ap_write_buf_noincr(struct adiv5_ap *ap,
const uint8_t *buffer, uint32_t size, uint32_t count, uint32_t address);
const uint8_t *buffer, uint32_t size, uint32_t count, target_addr_t address);
/* Initialisation of the debug system, power domains and registers */
int dap_dp_init(struct adiv5_dap *dap);
@@ -560,7 +582,7 @@ void dap_invalidate_cache(struct adiv5_dap *dap);
/* Probe the AP for ROM Table location */
int dap_get_debugbase(struct adiv5_ap *ap,
uint32_t *dbgbase, uint32_t *apid);
target_addr_t *dbgbase, uint32_t *apid);
/* Probe Access Ports to find a particular type */
int dap_find_ap(struct adiv5_dap *dap,
@@ -574,7 +596,7 @@ static inline struct adiv5_ap *dap_ap(struct adiv5_dap *dap, uint8_t ap_num)
/* Lookup CoreSight component */
int dap_lookup_cs_component(struct adiv5_ap *ap,
uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx);
target_addr_t dbgbase, uint8_t type, target_addr_t *addr, int32_t *idx);
struct target;