forked from auracaster/openocd
cfg: add stm32 cmsis-dap compliant config
Change-Id: I3cfb21fdcef830e22b03bf4b5d58993728cc7475 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1543 Tested-by: jenkins
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@@ -1,5 +1,10 @@
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# script for stm32l
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#
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# stm32 devices support both JTAG and SWD transports.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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@@ -25,7 +30,9 @@ if { [info exists WORKAREASIZE] } {
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adapter_khz 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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if {$using_jtag} {
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jtag_ntrst_delay 100
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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@@ -35,7 +42,8 @@ if { [info exists CPUTAPID] } {
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# Section 24.6.3
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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# FIXME this never gets used to override defaults...
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@@ -45,14 +53,16 @@ if { [info exists BSTAPID] } {
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# Section 24.6.2
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set _BSTAPID 0x06416041
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
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if {$using_jtag} {
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
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