luminary: add peripheral reset script

some luminary device classes require a reset script
to emulate a hardware reset.

Change-Id: Id505c92451244b48b0238c2130aebab2df8d208b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/30
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Tested-by: Øyvind Harboe <oyvindharboe@gmail.com>
This commit is contained in:
Spencer Oliver
2011-10-17 22:04:21 +01:00
committed by Øyvind Harboe
parent 59beb93752
commit af37d5f196
3 changed files with 149 additions and 3 deletions

View File

@@ -70,6 +70,65 @@ adapter_khz 500
source [find mem_helper.tcl]
proc reset_peripherals {family} {
source [find chip/ti/lm3s/lm3s.tcl]
echo "Resetting Core Peripherals"
# Disable the PLL and the system clock divider (nop if disabled)
mmw $SYSCTL_RCC 0 $SYSCTL_RCC_USESYSDIV
mmw $SYSCTL_RCC2 $SYSCTL_RCC2_BYPASS2 0
# RCC and RCC2 to their reset values
mww $SYSCTL_RCC [expr (0x078e3ad0 | ([mrw $SYSCTL_RCC] & $SYSCTL_RCC_MOSCDIS))]
mww $SYSCTL_RCC2 0x07806810
mww $SYSCTL_RCC 0x078e3ad1
# Reset the deep sleep clock configuration register
mww $SYSCTL_DSLPCLKCFG 0x07800000
# Reset the clock gating registers
mww $SYSCTL_RCGC0 0x00000040
mww $SYSCTL_RCGC1 0
mww $SYSCTL_RCGC2 0
mww $SYSCTL_SCGC0 0x00000040
mww $SYSCTL_SCGC1 0
mww $SYSCTL_SCGC2 0
mww $SYSCTL_DCGC0 0x00000040
mww $SYSCTL_DCGC1 0
mww $SYSCTL_DCGC2 0
# Reset the remaining SysCtl registers
mww $SYSCTL_PBORCTL 0
mww $SYSCTL_IMC 0
mww $SYSCTL_GPIOHBCTL 0
mww $SYSCTL_MOSCCTL 0
mww $SYSCTL_PIOSCCAL 0
mww $SYSCTL_I2SMCLKCFG 0
# Reset the peripherals
mww $SYSCTL_SRCR0 0xffffffff
mww $SYSCTL_SRCR1 0xffffffff
mww $SYSCTL_SRCR2 0xffffffff
mww $SYSCTL_SRCR0 0
mww $SYSCTL_SRCR1 0
mww $SYSCTL_SRCR2 0
# Clear any pending SysCtl interrupts
mww $SYSCTL_MISC 0xffffffff
# Wait for any pending flash operations to complete
while {[expr [mrw $FLASH_FMC] & 0xffff] != 0} { sleep 1 }
while {[expr [mrw $FLASH_FMC2] & 0xffff] != 0} { sleep 1 }
# Reset the flash controller registers
mww $FLASH_FMA 0
mww $FLASH_FCIM 0
mww $FLASH_FCMISC 0xffffffff
mww $FLASH_FWBVAL 0
}
$_TARGETNAME configure -event reset-start {
adapter_khz 500
@@ -99,12 +158,14 @@ $_TARGETNAME configure -event reset-start {
cortex_m3 reset_config sysresetreq
} else {
# Tempest and newer default to using NVIC VECTRESET
# this does mean a reset-init event handler is required to reset
# any peripherals
# peripherals will need reseting manually, see proc reset_peripherals
cortex_m3 reset_config vectreset
# reset peripherals, based on code in
# http://www.ti.com/lit/er/spmz573a/spmz573a.pdf
reset_peripherals $device_class
}
}
# flash configuration ... autodetects sizes, autoprobed
flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME