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target: rename CamelCase symbols

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No major cross dependencies, mostly changes internal to each
file/function.

Change-Id: I7cc87458a341bae29a4f772b0af5d97b4bfc2da3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6343
Tested-by: jenkins
Reviewed-by: Marc Schink <dev@zapb.de>
This commit is contained in:
Antonio Borneo
2021-04-27 18:46:43 +02:00
parent 20b29b7767
commit b159f5cded
11 changed files with 202 additions and 202 deletions
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8
src/target/esirisc_regs.h
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@@ -148,8 +148,8 @@ enum esirisc_reg_num {
#define CSR_DEBUG_HWDC 0x03 /* Hardware Debug Control */
#define CSR_DEBUG_DBS 0x04 /* Data Breakpoint Size */
#define CSR_DEBUG_DBR 0x05 /* Data Breakpoint Range */
#define CSR_DEBUG_IBAn 0x08 /* Instruction Breakpoint Address [0..7] */
#define CSR_DEBUG_DBAn 0x10 /* Data Breakpoint Address [0..7] */
#define CSR_DEBUG_IBA_N 0x08 /* Instruction Breakpoint Address [0..7] */
#define CSR_DEBUG_DBA_N 0x10 /* Data Breakpoint Address [0..7] */
/* Configuration CSRs */
#define CSR_CONFIG_ARCH0 0x00 /* Architectural Configuration 0 */
@@ -160,12 +160,12 @@ enum esirisc_reg_num {
#define CSR_CONFIG_IC 0x05 /* Instruction Cache Configuration */
#define CSR_CONFIG_DC 0x06 /* Data Cache Configuration */
#define CSR_CONFIG_INT 0x07 /* Interrupt Configuration */
#define CSR_CONFIG_ISAn 0x08 /* Instruction Set Configuration [0..6] */
#define CSR_CONFIG_ISA_N 0x08 /* Instruction Set Configuration [0..6] */
#define CSR_CONFIG_DBG 0x0f /* Debug Configuration */
#define CSR_CONFIG_MID 0x10 /* Manufacturer ID */
#define CSR_CONFIG_REV 0x11 /* Revision Number */
#define CSR_CONFIG_MPID 0x12 /* Multiprocessor ID */
#define CSR_CONFIG_FREQn 0x13 /* Frequency [0..2] */
#define CSR_CONFIG_FREQ_N 0x13 /* Frequency [0..2] */
#define CSR_CONFIG_TRACE 0x16 /* Trace Configuration */
/* Trace CSRs */