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aarch64: armv8 cache functions update

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Update cache identification to match functionality present in
armv7a_cache.c

Change-Id: I2dc4bee80f5a22b8728334d40331c183d1406f27
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
This commit is contained in:
Matthias Welwarsky
2016-09-22 21:29:42 +02:00
parent ef263a45a2
commit b69750fd0d
5 changed files with 353 additions and 271 deletions
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6
src/target/aarch64.c
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@@ -735,8 +735,10 @@ static int aarch64_post_debug_entry(struct target *target)
LOG_DEBUG("System_register: %8.8" PRIx32, aarch64->system_control_reg);
aarch64->system_control_reg_curr = aarch64->system_control_reg;
if (armv8->armv8_mmu.armv8_cache.ctype == -1)
armv8_identify_cache(target);
if (armv8->armv8_mmu.armv8_cache.info == -1) {
armv8_identify_cache(armv8);
armv8_read_mpidr(armv8);
}
armv8->armv8_mmu.mmu_enabled =
(aarch64->system_control_reg & 0x1U) ? 1 : 0;