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target: riscv: align switch and case statements

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The coding style requires the 'case' to be at the same indentation
level of its 'switch' statement.

Align the code accordingly.

While there, put at newline the command after the 'case'.

No changes are reported by
	git log -p -w --ignore-blank-lines --patience
apart from the newline after 'case'.

Change-Id: Id856e24100de6fb0442afe8bc51545b0138ef02d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9069
Tested-by: jenkins
Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Antonio Borneo
2025-08-02 19:33:37 +02:00
committed by Tomas Vanek
parent 56141bb349
commit bd303d6a3d
5 changed files with 891 additions and 885 deletions
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34
src/target/riscv/riscv-011.c
View File

@@ -232,16 +232,22 @@ static unsigned int slot_offset(const struct target *target, slot_t slot)
switch (riscv_xlen(target)) { switch (riscv_xlen(target)) {
case 32: case 32:
switch (slot) { switch (slot) {
case SLOT0: return 4; case SLOT0:
case SLOT1: return 5; return 4;
case SLOT_LAST: return info->dramsize-1; case SLOT1:
return 5;
case SLOT_LAST:
return info->dramsize - 1;
} }
break; break;
case 64: case 64:
switch (slot) { switch (slot) {
case SLOT0: return 4; case SLOT0:
case SLOT1: return 6; return 4;
case SLOT_LAST: return info->dramsize-2; case SLOT1:
return 6;
case SLOT_LAST:
return info->dramsize - 2;
} }
} }
LOG_ERROR("slot_offset called with xlen=%d, slot=%d", LOG_ERROR("slot_offset called with xlen=%d, slot=%d",
@@ -2115,13 +2121,13 @@ static int read_memory(struct target *target, const struct riscv_mem_access_args
break; break;
case 2: case 2:
buffer[offset] = data; buffer[offset] = data;
buffer[offset+1] = data >> 8; buffer[offset + 1] = data >> 8;
break; break;
case 4: case 4:
buffer[offset] = data; buffer[offset] = data;
buffer[offset+1] = data >> 8; buffer[offset + 1] = data >> 8;
buffer[offset+2] = data >> 16; buffer[offset + 2] = data >> 16;
buffer[offset+3] = data >> 24; buffer[offset + 3] = data >> 24;
break; break;
} }
} }
@@ -2246,13 +2252,13 @@ static int write_memory(struct target *target, const struct riscv_mem_access_arg
break; break;
case 2: case 2:
value = buffer[offset] | value = buffer[offset] |
(buffer[offset+1] << 8); (buffer[offset + 1] << 8);
break; break;
case 4: case 4:
value = buffer[offset] | value = buffer[offset] |
((uint32_t) buffer[offset+1] << 8) | ((uint32_t)buffer[offset + 1] << 8) |
((uint32_t) buffer[offset+2] << 16) | ((uint32_t)buffer[offset + 2] << 16) |
((uint32_t) buffer[offset+3] << 24); ((uint32_t)buffer[offset + 3] << 24);
break; break;
default: default:
goto error; goto error;

4
src/target/riscv/riscv-013.c
View File

@@ -1257,7 +1257,7 @@ static int scratch_read64(struct target *target, scratch_mem_t *scratch,
*value = v; *value = v;
if (dm_read(target, &v, DM_DATA1 + scratch->debug_address) != ERROR_OK) if (dm_read(target, &v, DM_DATA1 + scratch->debug_address) != ERROR_OK)
return ERROR_FAIL; return ERROR_FAIL;
*value |= ((uint64_t) v) << 32; *value |= ((uint64_t)v) << 32;
break; break;
case SPACE_DMI_PROGBUF: case SPACE_DMI_PROGBUF:
if (dm_read(target, &v, DM_PROGBUF0 + scratch->debug_address) != ERROR_OK) if (dm_read(target, &v, DM_PROGBUF0 + scratch->debug_address) != ERROR_OK)
@@ -1265,7 +1265,7 @@ static int scratch_read64(struct target *target, scratch_mem_t *scratch,
*value = v; *value = v;
if (dm_read(target, &v, DM_PROGBUF1 + scratch->debug_address) != ERROR_OK) if (dm_read(target, &v, DM_PROGBUF1 + scratch->debug_address) != ERROR_OK)
return ERROR_FAIL; return ERROR_FAIL;
*value |= ((uint64_t) v) << 32; *value |= ((uint64_t)v) << 32;
break; break;
case SPACE_DMI_RAM: case SPACE_DMI_RAM:
{ {