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flash/nor: use target_addr_t for flash bank base

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This should allow users to configure flash at >32-bit addresses.

Change-Id: I7c9d3c5762579011a2d9708e5317e5765349845c
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4919
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This commit is contained in:
Tim Newsome
2019-02-14 17:33:28 -08:00
committed by Matthias Welwarsky
parent 57e30102ea
commit c3b90c052a
28 changed files with 121 additions and 98 deletions
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22
src/flash/nor/kinetis.c
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@@ -1755,13 +1755,15 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer
result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer_aligned);
LOG_DEBUG("section @ %08" PRIx32 " aligned begin %" PRIu32 ", end %" PRIu32,
LOG_DEBUG("section @ " TARGET_ADDR_FMT " aligned begin %" PRIu32
", end %" PRIu32,
bank->base + offset, align_begin, align_end);
} else
result = target_write_memory(bank->target, k_chip->progr_accel_ram,
4, size_aligned / 4, buffer);
LOG_DEBUG("write section @ %08" PRIx32 " with length %" PRIu32 " bytes",
LOG_DEBUG("write section @ " TARGET_ADDR_FMT " with length %" PRIu32
" bytes",
bank->base + offset, size);
if (result != ERROR_OK) {
@@ -1776,12 +1778,14 @@ static int kinetis_write_sections(struct flash_bank *bank, const uint8_t *buffer
0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) {
LOG_ERROR("Error writing section at %08" PRIx32, bank->base + offset);
LOG_ERROR("Error writing section at " TARGET_ADDR_FMT,
bank->base + offset);
break;
}
if (ftfx_fstat & 0x01) {
LOG_ERROR("Flash write error at %08" PRIx32, bank->base + offset);
LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
bank->base + offset);
if (k_bank->prog_base == 0 && offset == FCF_ADDRESS + FCF_SIZE
&& (k_chip->flash_support & FS_WIDTH_256BIT)) {
LOG_ERROR("Flash write immediately after the end of Flash Config Field shows error");
@@ -1820,7 +1824,7 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
}
}
LOG_DEBUG("flash write @ %08" PRIx32, bank->base + offset);
LOG_DEBUG("flash write @ " TARGET_ADDR_FMT, bank->base + offset);
if (fallback == 0) {
/* program section command */
@@ -1873,12 +1877,14 @@ static int kinetis_write_inner(struct flash_bank *bank, const uint8_t *buffer,
0, 0, 0, 0, &ftfx_fstat);
if (result != ERROR_OK) {
LOG_ERROR("Error writing longword at %08" PRIx32, bank->base + offset);
LOG_ERROR("Error writing longword at " TARGET_ADDR_FMT,
bank->base + offset);
break;
}
if (ftfx_fstat & 0x01)
LOG_ERROR("Flash write error at %08" PRIx32, bank->base + offset);
LOG_ERROR("Flash write error at " TARGET_ADDR_FMT,
bank->base + offset);
buffer += 4;
offset += 4;
@@ -2769,7 +2775,7 @@ static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
uint32_t size_k = bank->size / 1024;
snprintf(buf, buf_size,
"%s %s: %" PRIu32 "k %s bank %s at 0x%08" PRIx32,
"%s %s: %" PRIu32 "k %s bank %s at " TARGET_ADDR_FMT,
bank->driver->name, k_chip->name,
size_k, bank_class_names[k_bank->flash_class],
bank->name, bank->base);