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armv7a: rework automatic flush-on-write handling

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The following changes are implemented:
- Clean&Invalidate the VA range to PoC *before* the write takes place
- Remove SMP handling since DCCIMVA instruction already maintains SMP
  coherence.
- Remove separate Invalidate step

Change-Id: I19fd3cc226d8ecf2937276fc63258b6a26e369a7
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3027
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
This commit is contained in:
Matthias Welwarsky
2015-10-16 10:10:02 +02:00
committed by Paul Fertser
parent 7986faba21
commit d17c11759f
3 changed files with 15 additions and 35 deletions
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src/target/armv7a_cache.h
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@@ -29,7 +29,8 @@ int armv7a_l1_i_cache_inval_virt(struct target *target, uint32_t virt,
int armv7a_cache_auto_flush_on_write(struct target *target, uint32_t virt,
uint32_t size);
int armv7a_cache_auto_flush_all_data(struct target *target);
int armv7a_cache_flush_virt(struct target *target, uint32_t virt,
uint32_t size);
extern const struct command_registration arm7a_cache_command_handlers[];
/* CLIDR cache types */