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semihosting armv7a: Add support for ARMv7-A

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Add semihosting support for ARMv7-A based processors.

Tested with custom Vybrid VF610 based board
and Pandaboard ES (Rev. B1) board (Cortex-A9).

Change-Id: I6b896a61c1c6a1c5dcf89de834486f82dd6c80a2
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Tsung-Han Lin <tsunghan.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/2908
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
This commit is contained in:
Andrey Smirnov
2015-08-08 15:18:16 -07:00
committed by Freddie Chopin
parent b10037a0b7
commit d1bdcdcc8d
4 changed files with 89 additions and 4 deletions
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13
src/target/armv7a.h
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@@ -134,6 +134,12 @@ target_to_armv7a(struct target *target)
return container_of(target->arch_info, struct armv7a_common, arm);
}
static inline bool is_armv7a(struct armv7a_common *armv7a)
{
return armv7a->common_magic == ARMV7_COMMON_MAGIC;
}
/* register offsets from armv7a.debug_base */
/* See ARMv7a arch spec section C10.2 */
@@ -172,6 +178,13 @@ target_to_armv7a(struct target *target)
/* See ARMv7a arch spec section C10.8 */
#define CPUDBG_AUTHSTATUS 0xFB8
/* Masks for Vector Catch register */
#define DBG_VCR_FIQ_MASK ((1 << 31) | (1 << 7))
#define DBG_VCR_IRQ_MASK ((1 << 30) | (1 << 6))
#define DBG_VCR_DATA_ABORT_MASK ((1 << 28) | (1 << 4))
#define DBG_VCR_PREF_ABORT_MASK ((1 << 27) | (1 << 3))
#define DBG_VCR_SVC_MASK ((1 << 26) | (1 << 2))
int armv7a_arch_state(struct target *target);
int armv7a_identify_cache(struct target *target);
int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a);