forked from auracaster/openocd
ADIv5 share DAP command support
Get rid of needless and undesirable code duplication for all the DAP commands (resolving a FIXME) ... there's no need for coreas to have private copies of that stuff. Stick a pointer to the DAP in "struct arm", letting common code get to it. Also rename the "swjdp_info" symbol; just call it "dap". This is an overall code shrink. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
This commit is contained in:
David Brownell
@@ -69,6 +69,7 @@
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#include "config.h"
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#endif
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#include "arm.h"
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#include "arm_adi_v5.h"
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#include <helper/time_support.h>
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@@ -1352,7 +1353,7 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0)
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&& ((cid1 & 0x0f) == 0) && cid0 == 0x0d;
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}
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int dap_info_command(struct command_context *cmd_ctx,
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static int dap_info_command(struct command_context *cmd_ctx,
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struct adiv5_dap *swjdp, int apsel)
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{
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int retval;
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@@ -1711,15 +1712,40 @@ int dap_info_command(struct command_context *cmd_ctx,
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return ERROR_OK;
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}
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DAP_COMMAND_HANDLER(dap_baseaddr_command)
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COMMAND_HANDLER(handle_dap_info_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct arm *arm = target_to_arm(target);
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struct adiv5_dap *dap = arm->dap;
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uint32_t apsel;
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switch (CMD_ARGC) {
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case 0:
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apsel = dap->apsel;
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break;
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case 1:
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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return dap_info_command(CMD_CTX, dap, apsel);
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}
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COMMAND_HANDLER(dap_baseaddr_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct arm *arm = target_to_arm(target);
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struct adiv5_dap *dap = arm->dap;
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uint32_t apsel, apselsave, baseaddr;
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int retval;
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apselsave = swjdp->apsel;
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apselsave = dap->apsel;
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switch (CMD_ARGC) {
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case 0:
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apsel = swjdp->apsel;
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apsel = dap->apsel;
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break;
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case 1:
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
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@@ -1732,33 +1758,37 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command)
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}
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if (apselsave != apsel)
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dap_ap_select(swjdp, apsel);
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dap_ap_select(dap, apsel);
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/* NOTE: assumes we're talking to a MEM-AP, which
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* has a base address. There are other kinds of AP,
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* though they're not common for now. This should
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* use the ID register to verify it's a MEM-AP.
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*/
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retval = dap_queue_ap_read(swjdp, AP_REG_BASE, &baseaddr);
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retval = dap_run(swjdp);
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retval = dap_queue_ap_read(dap, AP_REG_BASE, &baseaddr);
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retval = dap_run(dap);
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if (retval != ERROR_OK)
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return retval;
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command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr);
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if (apselsave != apsel)
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dap_ap_select(swjdp, apselsave);
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dap_ap_select(dap, apselsave);
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return retval;
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}
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DAP_COMMAND_HANDLER(dap_memaccess_command)
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COMMAND_HANDLER(dap_memaccess_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct arm *arm = target_to_arm(target);
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struct adiv5_dap *dap = arm->dap;
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uint32_t memaccess_tck;
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switch (CMD_ARGC) {
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case 0:
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memaccess_tck = swjdp->memaccess_tck;
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memaccess_tck = dap->memaccess_tck;
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break;
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case 1:
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck);
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@@ -1766,16 +1796,20 @@ DAP_COMMAND_HANDLER(dap_memaccess_command)
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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swjdp->memaccess_tck = memaccess_tck;
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dap->memaccess_tck = memaccess_tck;
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command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck",
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swjdp->memaccess_tck);
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dap->memaccess_tck);
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return ERROR_OK;
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}
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DAP_COMMAND_HANDLER(dap_apsel_command)
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COMMAND_HANDLER(dap_apsel_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct arm *arm = target_to_arm(target);
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struct adiv5_dap *dap = arm->dap;
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uint32_t apsel, apid;
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int retval;
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@@ -1793,9 +1827,9 @@ DAP_COMMAND_HANDLER(dap_apsel_command)
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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dap_ap_select(swjdp, apsel);
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retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &apid);
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retval = dap_run(swjdp);
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dap_ap_select(dap, apsel);
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retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
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retval = dap_run(dap);
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if (retval != ERROR_OK)
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return retval;
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@@ -1805,15 +1839,19 @@ DAP_COMMAND_HANDLER(dap_apsel_command)
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return retval;
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}
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DAP_COMMAND_HANDLER(dap_apid_command)
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COMMAND_HANDLER(dap_apid_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct arm *arm = target_to_arm(target);
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struct adiv5_dap *dap = arm->dap;
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uint32_t apsel, apselsave, apid;
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int retval;
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apselsave = swjdp->apsel;
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apselsave = dap->apsel;
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switch (CMD_ARGC) {
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case 0:
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apsel = swjdp->apsel;
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apsel = dap->apsel;
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break;
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case 1:
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
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@@ -1826,20 +1864,75 @@ DAP_COMMAND_HANDLER(dap_apid_command)
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}
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if (apselsave != apsel)
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dap_ap_select(swjdp, apsel);
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dap_ap_select(dap, apsel);
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retval = dap_queue_ap_read(swjdp, AP_REG_IDR, &apid);
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retval = dap_run(swjdp);
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retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid);
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retval = dap_run(dap);
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if (retval != ERROR_OK)
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return retval;
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command_print(CMD_CTX, "0x%8.8" PRIx32, apid);
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if (apselsave != apsel)
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dap_ap_select(swjdp, apselsave);
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dap_ap_select(dap, apselsave);
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return retval;
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}
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static const struct command_registration dap_commands[] = {
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{
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.name = "info",
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.handler = handle_dap_info_command,
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.mode = COMMAND_EXEC,
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.help = "display ROM table for MEM-AP "
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"(default currently selected AP)",
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.usage = "[ap_num]",
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},
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{
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.name = "apsel",
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.handler = dap_apsel_command,
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.mode = COMMAND_EXEC,
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.help = "Set the currently selected AP (default 0) "
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"and display the result",
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.usage = "[ap_num]",
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},
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{
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.name = "apid",
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.handler = dap_apid_command,
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.mode = COMMAND_EXEC,
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.help = "return ID register from AP "
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"(default currently selected AP)",
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.usage = "[ap_num]",
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},
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{
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.name = "baseaddr",
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.handler = dap_baseaddr_command,
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.mode = COMMAND_EXEC,
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.help = "return debug base address from MEM-AP "
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"(default currently selected AP)",
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.usage = "[ap_num]",
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},
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{
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.name = "memaccess",
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.handler = dap_memaccess_command,
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.mode = COMMAND_EXEC,
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.help = "set/get number of extra tck for MEM-AP memory "
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"bus access [0-255]",
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.usage = "[cycles]",
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},
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COMMAND_REGISTRATION_DONE
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};
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const struct command_registration dap_command_handlers[] = {
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{
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.name = "dap",
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.mode = COMMAND_EXEC,
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.help = "DAP command group",
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.chain = dap_commands,
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},
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COMMAND_REGISTRATION_DONE
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};
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/*
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* This represents the bits which must be sent out on TMS/SWDIO to
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* switch a DAP implemented using an SWJ-DP module into SWD mode.
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