ETM: start support for ETMv2+

ARM11 and newer cores include updated ETM modules.  Recognize
their version codes and some key config differences.  Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).

This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.

Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same.  That still needs to change.

Fix a curious bug ... how did the register cache NOT get saved??

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

doc/openocd.texi

@@ -5295,11 +5295,23 @@ Several of the parameters must reflect the trace port capabilities,
 which are a function of silicon capabilties (exposed later
 using @command{etm info}) and of what hardware is connected to
 that port (such as an external pod, or ETB).
-The @var{width} must be either 4, 8, or 16.
-The @var{mode} must be @option{normal}, @option{multiplexted},
-or @option{demultiplexted}.
+The @var{width} must be either 4, 8, or 16,
+except with ETMv3.0 and newer modules which may also
+support 1, 2, 24, 32, 48, and 64 bit widths.
+(With those versions, @command{etm info} also shows whether
+the selected port width and mode are supported.)
+
+The @var{mode} must be @option{normal}, @option{multiplexed},
+or @option{demultiplexed}.
 The @var{clocking} must be @option{half} or @option{full}.
 
+@quotation Warning
+With ETMv3.0 and newer, the bits set with the @var{mode} and
+@var{clocking} parameters both control the mode.
+This modified mode does not map to the values supported by
+previous ETM modules, so this syntax is subject to change.
+@end quotation
+
 @quotation Note
 You can see the ETM registers using the @command{reg} command.
 Not all possible registers are present in every ETM.