Make #include guard naming consistent

Change-Id: Ie13e8af0bb74ed290f811dcad64ad06c9d8cb4fa
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2956
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This commit is contained in:
Marc Schink
2015-09-21 21:07:46 +02:00
committed by Andreas Fritiofson
parent d0e763ac7e
commit d4b7cbff88
164 changed files with 544 additions and 463 deletions

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ALGORITHM_H
#define ALGORITHM_H
#ifndef OPENOCD_TARGET_ALGORITHM_H
#define OPENOCD_TARGET_ALGORITHM_H
enum param_direction {
PARAM_IN,
@@ -47,4 +47,4 @@ void init_reg_param(struct reg_param *param,
char *reg_name, uint32_t size, enum param_direction dir);
void destroy_reg_param(struct reg_param *param);
#endif /* ALGORITHM_H */
#endif /* OPENOCD_TARGET_ALGORITHM_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ARM_H
#define ARM_H
#ifndef OPENOCD_TARGET_ARM_H
#define OPENOCD_TARGET_ARM_H
#include <helper/command.h>
#include "target.h"
@@ -240,4 +240,4 @@ struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
extern struct reg arm_gdb_dummy_fp_reg;
extern struct reg arm_gdb_dummy_fps_reg;
#endif /* ARM_H */
#endif /* OPENOCD_TARGET_ARM_H */

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@@ -18,8 +18,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM11_H
#define ARM11_H
#ifndef OPENOCD_TARGET_ARM11_H
#define OPENOCD_TARGET_ARM11_H
#include "arm.h"
#include "arm_dpm.h"
@@ -111,4 +111,4 @@ enum arm11_sc7 {
ARM11_SC7_WCR0 = 112,
};
#endif /* ARM11_H */
#endif /* OPENOCD_TARGET_ARM11_H */

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@@ -18,8 +18,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM11_DBGTAP_H
#define ARM11_DBGTAP_H
#ifndef OPENOCD_TARGET_ARM11_DBGTAP_H
#define OPENOCD_TARGET_ARM11_DBGTAP_H
#include "arm11.h"
@@ -80,4 +80,4 @@ int arm11_read_memory_word(struct arm11_common *arm11,
int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr);
int arm11_bpwp_flush(struct arm11_common *arm11);
#endif /* ARM11_DBGTAP_H */
#endif /* OPENOCD_TARGET_ARM11_DBGTAP_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM720T_H
#define ARM720T_H
#ifndef OPENOCD_TARGET_ARM720T_H
#define OPENOCD_TARGET_ARM720T_H
#include "arm7tdmi.h"
#include "armv4_5_mmu.h"
@@ -38,4 +38,4 @@ static inline struct arm720t_common *target_to_arm720(struct target *target)
return container_of(target->arch_info, struct arm720t_common, arm7_9_common.arm);
}
#endif /* ARM720T_H */
#endif /* OPENOCD_TARGET_ARM720T_H */

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@@ -25,8 +25,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM7_9_COMMON_H
#define ARM7_9_COMMON_H
#ifndef OPENOCD_TARGET_ARM7_9_COMMON_H
#define OPENOCD_TARGET_ARM7_9_COMMON_H
#include "arm.h"
#include "arm_jtag.h"
@@ -192,4 +192,4 @@ int arm7_9_endianness_callback(jtag_callback_data_t pu8_in,
jtag_callback_data_t i_size, jtag_callback_data_t i_be,
jtag_callback_data_t i_flip);
#endif /* ARM7_9_COMMON_H */
#endif /* OPENOCD_TARGET_ARM7_9_COMMON_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM7TDMI_H
#define ARM7TDMI_H
#ifndef OPENOCD_TARGET_ARM7TDMI_H
#define OPENOCD_TARGET_ARM7TDMI_H
#include "embeddedice.h"
@@ -29,4 +29,4 @@ int arm7tdmi_init_arch_info(struct target *target,
int arm7tdmi_init_target(struct command_context *cmd_ctx,
struct target *target);
#endif /* ARM7TDMI_H */
#endif /* OPENOCD_TARGET_ARM7TDMI_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM920T_H
#define ARM920T_H
#ifndef OPENOCD_TARGET_ARM920T_H
#define OPENOCD_TARGET_ARM920T_H
#include "arm9tdmi.h"
#include "armv4_5_mmu.h"
@@ -68,4 +68,4 @@ int arm920t_enable_mmu_caches(struct target *target,
extern const struct command_registration arm920t_command_handlers[];
#endif /* ARM920T_H */
#endif /* OPENOCD_TARGET_ARM920T_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM926EJS_H
#define ARM926EJS_H
#ifndef OPENOCD_TARGET_ARM926EJS_H
#define OPENOCD_TARGET_ARM926EJS_H
#include "arm9tdmi.h"
#include "armv4_5_mmu.h"
@@ -52,4 +52,4 @@ int arm926ejs_soft_reset_halt(struct target *target);
extern const struct command_registration arm926ejs_command_handlers[];
#endif /* ARM926EJS_H */
#endif /* OPENOCD_TARGET_ARM926EJS_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM946E_H
#define ARM946E_H
#ifndef OPENOCD_TARGET_ARM946E_H
#define OPENOCD_TARGET_ARM946E_H
#include "arm9tdmi.h"
@@ -48,4 +48,4 @@ int arm946e_write_cp15(struct target *target, int reg_addr, uint32_t value);
extern const struct command_registration arm946e_command_handlers[];
#endif /* ARM946E_H */
#endif /* OPENOCD_TARGET_ARM946E_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM966E_H
#define ARM966E_H
#ifndef OPENOCD_TARGET_ARM966E_H
#define OPENOCD_TARGET_ARM966E_H
#include "arm9tdmi.h"
@@ -45,4 +45,4 @@ int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value);
extern const struct command_registration arm966e_command_handlers[];
#endif /* ARM966E_H */
#endif /* OPENOCD_TARGET_ARM966E_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM9TDMI_H
#define ARM9TDMI_H
#ifndef OPENOCD_TARGET_ARM9TDMI_H
#define OPENOCD_TARGET_ARM9TDMI_H
#include "embeddedice.h"
@@ -53,4 +53,4 @@ void arm9tdmi_branch_resume(struct target *target);
void arm9tdmi_enable_single_step(struct target *target, uint32_t next_pc);
void arm9tdmi_disable_single_step(struct target *target);
#endif /* ARM9TDMI_H */
#endif /* OPENOCD_TARGET_ARM9TDMI_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM_ADI_V5_H
#define ARM_ADI_V5_H
#ifndef OPENOCD_TARGET_ARM_ADI_V5_H
#define OPENOCD_TARGET_ARM_ADI_V5_H
/**
* @file
@@ -504,4 +504,4 @@ int dap_to_jtag(struct target *target);
extern const struct command_registration dap_command_handlers[];
#endif
#endif /* OPENOCD_TARGET_ARM_ADI_V5_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM_DISASSEMBLER_H
#define ARM_DISASSEMBLER_H
#ifndef OPENOCD_TARGET_ARM_DISASSEMBLER_H
#define OPENOCD_TARGET_ARM_DISASSEMBLER_H
enum arm_instruction_type {
ARM_UNKNOWN_INSTUCTION,
@@ -201,4 +201,4 @@ int arm_access_size(struct arm_instruction *instruction);
#define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])
#endif /* ARM_DISASSEMBLER_H */
#endif /* OPENOCD_TARGET_ARM_DISASSEMBLER_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __ARM_DPM_H
#define __ARM_DPM_H
#ifndef OPENOCD_TARGET_ARM_DPM_H
#define OPENOCD_TARGET_ARM_DPM_H
/**
* @file
@@ -198,4 +198,4 @@ void arm_dpm_report_wfar(struct arm_dpm *, uint32_t wfar);
void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dcsr);
#endif /* __ARM_DPM_H */
#endif /* OPENOCD_TARGET_ARM_DPM_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM_JTAG
#define ARM_JTAG
#ifndef OPENOCD_TARGET_ARM_JTAG_H
#define OPENOCD_TARGET_ARM_JTAG_H
#include <jtag/jtag.h>
@@ -75,4 +75,4 @@ static inline void arm_le_to_h_u32(jtag_callback_data_t arg)
*((uint32_t *)arg) = le_to_h_u32(in);
}
#endif /* ARM_JTAG */
#endif /* OPENOCD_TARGET_ARM_JTAG_H */

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@@ -24,8 +24,9 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __ARM_OPCODES_H
#define __ARM_OPCODES_H
#ifndef OPENOCD_TARGET_ARM_OPCODES_H
#define OPENOCD_TARGET_ARM_OPCODES_H
/**
* @file
@@ -309,4 +310,4 @@
((0xB660 | (0 << 8) | ((IF)&0x3)) \
| ((0xB660 | (0 << 8) | ((IF)&0x3)) << 16))
#endif /* __ARM_OPCODES_H */
#endif /* OPENOCD_TARGET_ARM_OPCODES_H */

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@@ -16,9 +16,9 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM_SEMIHOSTING_H
#define ARM_SEMIHOSTING_H
#ifndef OPENOCD_TARGET_ARM_SEMIHOSTING_H
#define OPENOCD_TARGET_ARM_SEMIHOSTING_H
int arm_semihosting(struct target *target, int *retval);
#endif
#endif /* OPENOCD_TARGET_ARM_SEMIHOSTING_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM_SIMULATOR_H
#define ARM_SIMULATOR_H
#ifndef OPENOCD_TARGET_ARM_SIMULATOR_H
#define OPENOCD_TARGET_ARM_SIMULATOR_H
struct target;
@@ -36,4 +36,4 @@ struct arm_sim_interface {
/* armv4_5 version */
int arm_simulate_step(struct target *target, uint32_t *dry_run_pc);
#endif /* ARM_SIMULATOR_H */
#endif /* OPENOCD_TARGET_ARM_SIMULATOR_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV4_5_H
#define ARMV4_5_H
#ifndef OPENOCD_TARGET_ARMV4_5_H
#define OPENOCD_TARGET_ARMV4_5_H
/* This stuff "knows" that its callers aren't talking
* to microcontroller profile (current Cortex-M) parts.
@@ -46,4 +46,4 @@ extern const int armv4_5_core_reg_map[8][17];
/* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
enum { ARMV4_5_CPSR = 31, };
#endif /* ARMV4_5_H */
#endif /* OPENOCD_TARGET_ARMV4_5_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV4_5_CACHE_H
#define ARMV4_5_CACHE_H
#ifndef OPENOCD_TARGET_ARMV4_5_CACHE_H
#define OPENOCD_TARGET_ARMV4_5_CACHE_H
struct command_context;
@@ -52,4 +52,4 @@ enum {
ARMV4_5_CACHE_RR_BIT = 0x5000,
};
#endif /* ARMV4_5_CACHE_H */
#endif /* OPENOCD_TARGET_ARMV4_5_CACHE_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV4_5_MMU_H
#define ARMV4_5_MMU_H
#ifndef OPENOCD_TARGET_ARMV4_5_MMU_H
#define OPENOCD_TARGET_ARMV4_5_MMU_H
#include "armv4_5_cache.h"
@@ -53,4 +53,4 @@ enum {
ARMV4_5_MMU_R_BIT = 0x200
};
#endif /* ARMV4_5_MMU_H */
#endif /* OPENOCD_TARGET_ARMV4_5_MMU_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV7A_H
#define ARMV7A_H
#ifndef OPENOCD_TARGET_ARMV7A_H
#define OPENOCD_TARGET_ARMV7A_H
#include "arm_adi_v5.h"
#include "armv7a_cache.h"
@@ -184,4 +184,4 @@ int armv7a_handle_cache_info_command(struct command_context *cmd_ctx,
extern const struct command_registration armv7a_command_handlers[];
#endif /* ARMV4_5_H */
#endif /* OPENOCD_TARGET_ARMV7A_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM7A_CACHE_H
#define ARM7A_CACHE_H
#ifndef OPENOCD_TARGET_ARM7A_CACHE_H
#define OPENOCD_TARGET_ARM7A_CACHE_H
#include "arm_jtag.h"
#include "armv7a_cache_l2x.h"
@@ -43,4 +43,4 @@ extern const struct command_registration arm7a_cache_command_handlers[];
#define CACHE_LEVEL_HAS_D_CACHE 0x2
#define CACHE_LEVEL_HAS_I_CACHE 0x1
#endif
#endif /* OPENOCD_TARGET_ARM7A_CACHE_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARM7A_CACHE_L2X_H
#define ARM7A_CACHE_L2X_H
#ifndef OPENOCD_TARGET_ARM7A_CACHE_L2X_H
#define OPENOCD_TARGET_ARM7A_CACHE_L2X_H
#define L2X0_CACHE_LINE_SIZE 32
@@ -155,4 +155,4 @@ int armv7a_l2x_cache_flush_virt(struct target *target, uint32_t virt,
uint32_t size);
int arm7a_l2x_flush_all_data(struct target *target);
#endif
#endif /* OPENOCD_TARGET_ARM7A_CACHE_L2X_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV7M_COMMON_H
#define ARMV7M_COMMON_H
#ifndef OPENOCD_TARGET_ARMV7M_H
#define OPENOCD_TARGET_ARMV7M_H
#include "arm_adi_v5.h"
#include "arm.h"
@@ -229,4 +229,4 @@ int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
extern const struct command_registration armv7m_command_handlers[];
#endif /* ARMV7M_H */
#endif /* OPENOCD_TARGET_ARMV7M_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ARMV7M_TRACE_H
#define ARMV7M_TRACE_H
#ifndef OPENOCD_TARGET_ARMV7M_TRACE_H
#define OPENOCD_TARGET_ARMV7M_TRACE_H
#include <target/target.h>
#include <command.h>
@@ -88,4 +88,4 @@ int armv7m_trace_tpiu_config(struct target *target);
*/
int armv7m_trace_itm_config(struct target *target);
#endif
#endif /* OPENOCD_TARGET_ARMV7M_TRACE_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef AVR32_AP7K
#define AVR32_AP7K
#ifndef OPENOCD_TARGET_AVR32_AP7K_H
#define OPENOCD_TARGET_AVR32_AP7K_H
struct target;
@@ -40,4 +40,4 @@ struct avr32_core_reg {
struct avr32_ap7k_common *avr32_common;
};
#endif /*AVR32_AP7K*/
#endif /* OPENOCD_TARGET_AVR32_AP7K_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef AVR32_JTAG
#define AVR32_JTAG
#ifndef OPENOCD_TARGET_AVR32_JTAG_H
#define OPENOCD_TARGET_AVR32_JTAG_H
#define AVR32NUMCOREREGS 17
@@ -100,4 +100,4 @@ int avr32_ocd_clearbits(struct avr32_jtag *jtag, int reg, uint32_t bits);
int avr32_jtag_exec(struct avr32_jtag *jtag_info, uint32_t inst);
#endif /* AVR32_JTAG */
#endif /* OPENOCD_TARGET_AVR32_JTAG_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef AVR32_MEM
#define AVR32_MEM
#ifndef OPENOCD_TARGET_AVR32_MEM_H
#define OPENOCD_TARGET_AVR32_MEM_H
int avr32_jtag_read_memory32(struct avr32_jtag *jtag_info,
uint32_t addr, int count, uint32_t *buffer);
@@ -32,4 +32,4 @@ int avr32_jtag_write_memory16(struct avr32_jtag *jtag_info,
int avr32_jtag_write_memory8(struct avr32_jtag *jtag_info,
uint32_t addr, int count, const uint8_t *buffer);
#endif /* AVR32_MEM */
#endif /* OPENOCD_TARGET_AVR32_MEM_H */

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@@ -15,8 +15,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef AVR32_REGS
#define AVR32_REGS
#ifndef OPENOCD_TARGET_AVR32_REGS_H
#define OPENOCD_TARGET_AVR32_REGS_H
enum avr32_reg_nums {
AVR32_REG_R0 = 0,
@@ -41,4 +41,4 @@ enum avr32_reg_nums {
int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs);
int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs);
#endif /* AVR32_REGS */
#endif /* OPENOCD_TARGET_AVR32_REGS_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef AVRT_H
#define AVRT_H
#ifndef OPENOCD_TARGET_AVRT_H
#define OPENOCD_TARGET_AVRT_H
#include <jtag/jtag.h>
@@ -34,4 +34,4 @@ int avr_jtag_sendinstr(struct jtag_tap *tap, uint8_t *ir_in, uint8_t ir_out);
int avr_jtag_senddat(struct jtag_tap *tap, uint32_t *dr_in, uint32_t dr_out,
int len);
#endif /* AVRT_H */
#endif /* OPENOCD_TARGET_AVRT_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef BREAKPOINTS_H
#define BREAKPOINTS_H
#ifndef OPENOCD_TARGET_BREAKPOINTS_H
#define OPENOCD_TARGET_BREAKPOINTS_H
struct target;
@@ -73,4 +73,4 @@ void watchpoint_remove(struct target *target, uint32_t address);
/* report type and address of just hit watchpoint */
int watchpoint_hit(struct target *target, enum watchpoint_rw *rw, uint32_t *address);
#endif /* BREAKPOINTS_H */
#endif /* OPENOCD_TARGET_BREAKPOINTS_H */

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@@ -25,8 +25,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef CORTEX_A_H
#define CORTEX_A_H
#ifndef OPENOCD_TARGET_CORTEX_A_H
#define OPENOCD_TARGET_CORTEX_A_H
#include "armv7a.h"
@@ -114,4 +114,4 @@ target_to_cortex_a(struct target *target)
return container_of(target->arch_info, struct cortex_a_common, armv7a_common.arm);
}
#endif /* CORTEX_A_H */
#endif /* OPENOCD_TARGET_CORTEX_A_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef CORTEX_M_H
#define CORTEX_M_H
#ifndef OPENOCD_TARGET_CORTEX_M_H
#define OPENOCD_TARGET_CORTEX_M_H
#include "armv7m.h"
@@ -211,4 +211,4 @@ void cortex_m_enable_watchpoints(struct target *target);
void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target);
void cortex_m_deinit_target(struct target *target);
#endif /* CORTEX_M_H */
#endif /* OPENOCD_TARGET_CORTEX_M_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DSP563XX_H
#define DSP563XX_H
#ifndef OPENOCD_TARGET_DSP563XX_H
#define OPENOCD_TARGET_DSP563XX_H
#include <jtag/jtag.h>
#include <target/dsp563xx_once.h>
@@ -70,4 +70,4 @@ static inline struct dsp563xx_common *target_to_dsp563xx(struct target *target)
return target->arch_info;
}
#endif /* DSP563XX_H */
#endif /* OPENOCD_TARGET_DSP563XX_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DSP563XX_ONCE_H
#define DSP563XX_ONCE_H
#ifndef OPENOCD_TARGET_DSP563XX_ONCE_H
#define OPENOCD_TARGET_DSP563XX_ONCE_H
#include <jtag/jtag.h>
@@ -86,4 +86,4 @@ int dsp563xx_once_execute_sw_ir(struct jtag_tap *tap, int flush, uint32_t opcode
/** double word instruction */
int dsp563xx_once_execute_dw_ir(struct jtag_tap *tap, int flush, uint32_t opcode, uint32_t operand);
#endif /* DSP563XX_ONCE_H */
#endif /* OPENOCD_TARGET_DSP563XX_ONCE_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef DSP5680XX_H
#define DSP5680XX_H
#ifndef OPENOCD_TARGET_DSP5680XX_H
#define OPENOCD_TARGET_DSP5680XX_H
#include <jtag/jtag.h>
@@ -379,4 +379,4 @@ int dsp5680xx_f_lock(struct target *target);
*/
int dsp5680xx_f_unlock(struct target *target);
#endif /* DSP5680XX_H */
#endif /* OPENOCD_TARGET_DSP5680XX_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef EMBEDDED_ICE_H
#define EMBEDDED_ICE_H
#ifndef OPENOCD_TARGET_EMBEDDEDICE_H
#define OPENOCD_TARGET_EMBEDDEDICE_H
#include "arm7_9_common.h"
@@ -125,4 +125,4 @@ static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_add
void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer,
int little, int count);
#endif /* EMBEDDED_ICE_H */
#endif /* OPENOCD_TARGET_EMBEDDEDICE_H */

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ETB_H
#define ETB_H
#ifndef OPENOCD_TARGET_ETB_H
#define OPENOCD_TARGET_ETB_H
/* ETB registers */
enum {
@@ -55,4 +55,4 @@ extern struct etm_capture_driver etb_capture_driver;
struct reg_cache *etb_build_reg_cache(struct etb *etb);
#endif /* ETB_H */
#endif /* OPENOCD_TARGET_ETB_H */

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@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ETM_H
#define ETM_H
#ifndef OPENOCD_TARGET_ETM_H
#define OPENOCD_TARGET_ETM_H
#include "trace.h"
#include "arm_jtag.h"
@@ -221,4 +221,4 @@ extern const struct command_registration etm_command_handlers[];
#define ERROR_ETM_CAPTURE_INIT_FAILED (-1302)
#define ERROR_ETM_ANALYSIS_FAILED (-1303)
#endif /* ETM_H */
#endif /* OPENOCD_TARGET_ETM_H */

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@@ -16,11 +16,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef ETM_DUMMY_H
#define ETM_DUMMY_H
#ifndef OPENOCD_TARGET_ETM_DUMMY_H
#define OPENOCD_TARGET_ETM_DUMMY_H
#include "etm.h"
extern struct etm_capture_driver etm_dummy_capture_driver;
#endif /* ETB_H */
#endif /* OPENOCD_TARGET_ETM_DUMMY_H */

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@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef IMAGE_H
#define IMAGE_H
#ifndef OPENOCD_TARGET_IMAGE_H
#define OPENOCD_TARGET_IMAGE_H
#include <helper/fileio.h>
@@ -107,4 +107,4 @@ int image_calculate_checksum(uint8_t *buffer, uint32_t nbytes,
#define ERROR_IMAGE_TEMPORARILY_UNAVAILABLE (-1402)
#define ERROR_IMAGE_CHECKSUM (-1403)
#endif /* IMAGE_H */
#endif /* OPENOCD_TARGET_IMAGE_H */

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@@ -29,8 +29,9 @@
* This is the interface to the probemode operations for Lakemont 1 (LMT1).
*/
#ifndef LAKEMONT_H
#define LAKEMONT_H
#ifndef OPENOCD_TARGET_LAKEMONT_H
#define OPENOCD_TARGET_LAKEMONT_H
#include <jtag/jtag.h>
#include <helper/types.h>
@@ -102,4 +103,4 @@ int lakemont_reset_assert(struct target *t);
int lakemont_reset_deassert(struct target *t);
int lakemont_update_after_probemode_entry(struct target *t);
#endif /* LAKEMONT_H */
#endif /* OPENOCD_TARGET_LAKEMONT_H */

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@@ -21,8 +21,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef MIPS32_H
#define MIPS32_H
#ifndef OPENOCD_TARGET_MIPS32_H
#define OPENOCD_TARGET_MIPS32_H
#include "target.h"
#include "mips32_pracc.h"
@@ -249,4 +249,4 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
int mips32_blank_check_memory(struct target *target,
uint32_t address, uint32_t count, uint32_t *blank);
#endif /*MIPS32_H*/
#endif /* OPENOCD_TARGET_MIPS32_H */

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@@ -21,8 +21,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef MIPS32_DMAACC_H
#define MIPS32_DMAACC_H
#ifndef OPENOCD_TARGET_MIPS32_DMAACC_H
#define OPENOCD_TARGET_MIPS32_DMAACC_H
#include "mips_ejtag.h"
@@ -38,4 +38,4 @@ int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info,
int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info,
uint32_t addr, int size, int count, const void *buf);
#endif
#endif /* OPENOCD_TARGET_MIPS32_DMAACC_H */

View File

@@ -21,8 +21,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef MIPS32_PRACC_H
#define MIPS32_PRACC_H
#ifndef OPENOCD_TARGET_MIPS32_PRACC_H
#define OPENOCD_TARGET_MIPS32_PRACC_H
#include <target/mips32.h>
#include <target/mips_ejtag.h>
@@ -99,4 +99,4 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info,
int mips32_cp0_write(struct mips_ejtag *ejtag_info,
uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
#endif
#endif /* OPENOCD_TARGET_MIPS32_PRACC_H */

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@@ -18,8 +18,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef MIPS_EJTAG
#define MIPS_EJTAG
#ifndef OPENOCD_TARGET_MIPS_EJTAG_H
#define OPENOCD_TARGET_MIPS_EJTAG_H
#include <jtag/jtag.h>
@@ -232,4 +232,4 @@ static inline void mips_le_to_h_u32(jtag_callback_data_t arg)
*((uint32_t *)arg) = le_to_h_u32(in);
}
#endif /* MIPS_EJTAG */
#endif /* OPENOCD_TARGET_MIPS_EJTAG_H */

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@@ -21,8 +21,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef MIPS_M4K_H
#define MIPS_M4K_H
#ifndef OPENOCD_TARGET_MIPS_M4K_H
#define OPENOCD_TARGET_MIPS_M4K_H
struct target;
@@ -43,4 +43,4 @@ target_to_m4k(struct target *target)
extern const struct command_registration mips_m4k_command_handlers[];
#endif /*MIPS_M4K_H*/
#endif /* OPENOCD_TARGET_MIPS_M4K_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_H__
#define __NDS32_H__
#ifndef OPENOCD_TARGET_NDS32_H
#define OPENOCD_TARGET_NDS32_H
#include <jtag/jtag.h>
#include "target.h"
@@ -454,4 +454,4 @@ static inline bool nds32_reach_max_interrupt_level(struct nds32 *nds32)
return nds32->max_interrupt_level == nds32->current_interrupt_level;
}
#endif /* __NDS32_H__ */
#endif /* OPENOCD_TARGET_NDS32_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_AICE_H__
#define __NDS32_AICE_H__
#ifndef OPENOCD_TARGET_NDS32_AICE_H
#define OPENOCD_TARGET_NDS32_AICE_H
#include <jtag/aice/aice_port.h>
@@ -157,4 +158,4 @@ static inline int aice_set_data_endian(struct aice_port_s *aice,
return aice->port->api->set_data_endian(aice->coreid, target_data_endian);
}
#endif
#endif /* OPENOCD_TARGET_NDS32_AICE_H */

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@@ -16,10 +16,11 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_CMD_H__
#define __NDS32_CMD_H__
#ifndef OPENOCD_TARGET_NDS32_CMD_H
#define OPENOCD_TARGET_NDS32_CMD_H
#include <helper/command.h>
extern const struct command_registration nds32_command_handlers[];
#endif /* __NDS32_CMD_H__ */
#endif /* OPENOCD_TARGET_NDS32_CMD_H */

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_DISASSEMBLER_H__
#define __NDS32_DISASSEMBLER_H__
#ifndef OPENOCD_TARGET_NDS32_DISASSEMBLER_H
#define OPENOCD_TARGET_NDS32_DISASSEMBLER_H
#include <target/nds32.h>
@@ -53,4 +53,4 @@ int nds32_read_opcode(struct nds32 *nds32, uint32_t address, uint32_t *value);
int nds32_evaluate_opcode(struct nds32 *nds32, uint32_t opcode, uint32_t address,
struct nds32_instruction *instruction);
#endif /* __NDS32_DISASSEMBLER_H__ */
#endif /* OPENOCD_TARGET_NDS32_DISASSEMBLER_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_EDM_H__
#define __NDS32_EDM_H__
#ifndef OPENOCD_TARGET_NDS32_EDM_H
#define OPENOCD_TARGET_NDS32_EDM_H
/**
* @file
@@ -111,4 +112,4 @@ enum nds_memory_select {
#define NDS_EDMSW_WDV (1 << 0)
#define NDS_EDMSW_RDV (1 << 1)
#endif /* __NDS32_EDM_H__ */
#endif /* OPENOCD_TARGET_NDS32_EDM_H */

View File

@@ -15,9 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_INSN_H__
#define __NDS32_INSN_H__
#ifndef OPENOCD_TARGET_NDS32_INSN_H
#define OPENOCD_TARGET_NDS32_INSN_H
#define NOP (0x40000009)
#define DSB (0x64000008)
@@ -75,5 +75,4 @@
extern const int NDS32_BREAK_16;
extern const int NDS32_BREAK_32;
#endif /* __NDS32_INSN_H__ */
#endif /* OPENOCD_TARGET_NDS32_INSN_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_REG_H__
#define __NDS32_REG_H__
#ifndef OPENOCD_TARGET_NDS32_REG_H
#define OPENOCD_TARGET_NDS32_REG_H
#define SRIDX(a, b, c) ((a << 7) | (b << 3) | c)
#define NDS32_REGISTER_DISABLE (0x0)
@@ -321,4 +322,4 @@ const char *nds32_reg_simple_name(uint32_t number);
const char *nds32_reg_symbolic_name(uint32_t number);
bool nds32_reg_exception(uint32_t number, uint32_t value);
#endif
#endif /* OPENOCD_TARGET_NDS32_REG_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_TLB_H__
#define __NDS32_TLB_H__
#ifndef OPENOCD_TARGET_NDS32_TLB_H
#define OPENOCD_TARGET_NDS32_TLB_H
#include "nds32.h"
@@ -43,4 +44,4 @@ extern int nds32_probe_tlb(struct nds32 *nds32, const uint32_t virtual_address,
extern int nds32_walk_page_table(struct nds32 *nds32, const uint32_t virtual_address,
uint32_t *physical_address);
#endif
#endif /* OPENOCD_TARGET_NDS32_TLB_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_V2_H__
#define __NDS32_V2_H__
#ifndef OPENOCD_TARGET_NDS32_V2_H
#define OPENOCD_TARGET_NDS32_V2_H
#include "nds32.h"
@@ -38,5 +39,4 @@ static inline struct nds32_v2_common *target_to_nds32_v2(struct target *target)
return container_of(target->arch_info, struct nds32_v2_common, nds32);
}
#endif /* __NDS32_V2_H__ */
#endif /* OPENOCD_TARGET_NDS32_V2_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_V3_H__
#define __NDS32_V3_H__
#ifndef OPENOCD_TARGET_NDS32_V3_H
#define OPENOCD_TARGET_NDS32_V3_H
#include "nds32.h"
@@ -41,4 +42,4 @@ static inline struct nds32_v3_common *target_to_nds32_v3(struct target *target)
return container_of(target->arch_info, struct nds32_v3_common, nds32);
}
#endif /* __NDS32_V3_H__ */
#endif /* OPENOCD_TARGET_NDS32_V3_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_V3_COMMON_H__
#define __NDS32_V3_COMMON_H__
#ifndef OPENOCD_TARGET_NDS32_V3_COMMON_H
#define OPENOCD_TARGET_NDS32_V3_COMMON_H
#include "target.h"
@@ -57,4 +58,4 @@ int nds32_v3_write_memory(struct target *target, uint32_t address,
int nds32_v3_init_target(struct command_context *cmd_ctx,
struct target *target);
#endif /* __NDS32_V3_COMMON_H__ */
#endif /* OPENOCD_TARGET_NDS32_V3_COMMON_H */

View File

@@ -15,8 +15,9 @@
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef __NDS32_V3M_H__
#define __NDS32_V3M_H__
#ifndef OPENOCD_TARGET_NDS32_V3M_H
#define OPENOCD_TARGET_NDS32_V3M_H
#include "nds32.h"
@@ -47,5 +48,4 @@ static inline struct nds32_v3m_common *target_to_nds32_v3m(struct target *target
return container_of(target->arch_info, struct nds32_v3m_common, nds32);
}
#endif /* __NDS32_V3M_H__ */
#endif /* OPENOCD_TARGET_NDS32_V3M_H */

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OOCD_TRACE_H
#define OOCD_TRACE_H
#ifndef OPENOCD_TARGET_OOCD_TRACE_H
#define OPENOCD_TARGET_OOCD_TRACE_H
#include <termios.h>
@@ -50,4 +50,4 @@ struct oocd_trace {
extern struct etm_capture_driver oocd_trace_capture_driver;
#endif /* OOCD_TRACE_TRACE_H */
#endif /* OPENOCD_TARGET_OOCD_TRACE_H */

View File

@@ -1,5 +1,5 @@
#ifndef _JSP_SERVER_H_
#define _JSP_SERVER_H_
#ifndef OPENOCD_TARGET_OPENRISC_JSP_SERVER_H
#define OPENOCD_TARGET_OPENRISC_JSP_SERVER_H
#include "or1k_tap.h"
#include "or1k.h"
@@ -14,4 +14,4 @@ struct jsp_service {
int jsp_init(struct or1k_jtag *jtag_info, char *banner);
int jsp_register_commands(struct command_context *cmd_ctx);
#endif /* _JSP_SERVER_H_ */
#endif /* OPENOCD_TARGET_OPENRISC_JSP_SERVER_H */

View File

@@ -23,8 +23,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OR1K_H
#define OR1K_H
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_H
#define OPENOCD_TARGET_OPENRISC_OR1K_H
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -155,4 +155,4 @@ enum or1k_debug_reg_nums {
*/
#define OR1K_ICBIR_CPU_REG_ADD ((4 << 11) + 2) /* IC Block Invalidate Register 0x2002 */
#endif
#endif /* OPENOCD_TARGET_OPENRISC_OR1K_H */

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@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OR1K_DU
#define OR1K_DU
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_DU_H
#define OPENOCD_TARGET_OPENRISC_OR1K_DU_H
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -75,5 +75,4 @@ int or1k_adv_jtag_jsp_xfer(struct or1k_jtag *jtag_info,
int *out_len, unsigned char *out_buffer,
int *in_len, unsigned char *in_buffer);
#endif
#endif /* OPENOCD_TARGET_OPENRISC_OR1K_DU_H */

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef _OR1K_TAP_H_
#define _OR1K_TAP_H_
#ifndef OPENOCD_TARGET_OPENRISC_OR1K_TAP_H
#define OPENOCD_TARGET_OPENRISC_OR1K_TAP_H
#ifdef HAVE_CONFIG_H
#include "config.h"
@@ -39,4 +39,4 @@ struct or1k_tap_ip {
const char *name;
};
#endif
#endif /* OPENOCD_TARGET_OPENRISC_OR1K_TAP_H */

View File

@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef REGISTER_H
#define REGISTER_H
#ifndef OPENOCD_TARGET_REGISTER_H
#define OPENOCD_TARGET_REGISTER_H
struct target;
@@ -149,4 +149,4 @@ void register_cache_invalidate(struct reg_cache *cache);
void register_init_dummy(struct reg *reg);
#endif /* REGISTER_H */
#endif /* OPENOCD_TARGET_REGISTER_H */

View File

@@ -16,6 +16,9 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef OPENOCD_TARGET_SMP_H
#define OPENOCD_TARGET_SMP_H
#include "server/server.h"
int gdb_read_smp_packet(struct connection *connection,
@@ -23,3 +26,4 @@ int gdb_read_smp_packet(struct connection *connection,
int gdb_write_smp_packet(struct connection *connection,
char const *packet, int packet_size);
#endif /* OPENOCD_TARGET_SMP_H */

View File

@@ -28,8 +28,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef TARGET_H
#define TARGET_H
#ifndef OPENOCD_TARGET_TARGET_H
#define OPENOCD_TARGET_TARGET_H
#include <helper/list.h>
@@ -683,4 +683,4 @@ void target_handle_event(struct target *t, enum target_event e);
extern bool get_target_reset_nag(void);
#endif /* TARGET_H */
#endif /* OPENOCD_TARGET_TARGET_H */

View File

@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef TARGET_REQUEST_H
#define TARGET_REQUEST_H
#ifndef OPENOCD_TARGET_TARGET_REQUEST_H
#define OPENOCD_TARGET_TARGET_REQUEST_H
struct target;
struct command_context;
@@ -52,4 +52,4 @@ int target_request_register_commands(struct command_context *cmd_ctx);
*/
bool target_got_message(void);
#endif /* TARGET_REQUEST_H */
#endif /* OPENOCD_TARGET_TARGET_REQUEST_H */

View File

@@ -22,8 +22,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef TARGET_TYPE_H
#define TARGET_TYPE_H
#ifndef OPENOCD_TARGET_TARGET_TYPE_H
#define OPENOCD_TARGET_TARGET_TYPE_H
#include <jim-nvp.h>
@@ -276,4 +276,4 @@ struct target_type {
uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds);
};
#endif /* TARGET_TYPE_H */
#endif /* OPENOCD_TARGET_TARGET_TYPE_H */

View File

@@ -16,8 +16,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef TRACE_H
#define TRACE_H
#ifndef OPENOCD_TARGET_TRACE_H
#define OPENOCD_TARGET_TRACE_H
struct target;
struct command_context;
@@ -56,4 +56,4 @@ int trace_register_commands(struct command_context *cmd_ctx);
#define ERROR_TRACE_IMAGE_UNAVAILABLE (-1500)
#define ERROR_TRACE_INSTRUCTION_UNAVAILABLE (-1501)
#endif /* TRACE_H */
#endif /* OPENOCD_TARGET_TRACE_H */

View File

@@ -29,8 +29,8 @@
* This is the interface to the x86 32 bit memory and breakpoint operations.
*/
#ifndef X86_32_COMMON_H
#define X86_32_COMMON_H
#ifndef OPENOCD_TARGET_X86_32_COMMON_H
#define OPENOCD_TARGET_X86_32_COMMON_H
#include <jtag/jtag.h>
#include <helper/command.h>
@@ -327,4 +327,4 @@ int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp);
int x86_32_common_add_watchpoint(struct target *t, struct watchpoint *wp);
int x86_32_common_remove_watchpoint(struct target *t, struct watchpoint *wp);
#endif /* X86_32_COMMON_H */
#endif /* OPENOCD_TARGET_X86_32_COMMON_H */

View File

@@ -19,8 +19,8 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifndef XSCALE_H
#define XSCALE_H
#ifndef OPENOCD_TARGET_XSCALE_H
#define OPENOCD_TARGET_XSCALE_H
#include "arm.h"
#include "armv4_5_mmu.h"
@@ -185,4 +185,4 @@ enum {
#define DCSR_TRAP_MASK \
(DCSR_TF | DCSR_TI | DCSR_TD | DCSR_TA | DCSR_TS | DCSR_TU | DCSR_TR)
#endif /* XSCALE_H */
#endif /* OPENOCD_TARGET_XSCALE_H */