auracaster/sw_openocd
3
0
Fork 0
forked from auracaster/openocd
Code Pull Requests Activity

Start cleaning up ETM register handling. On one ARM926 ETM+ETB

Browse Source 
system, removes 20 non-existent registers ... but still includes
over 45 (!) ETM registers which don't even exist there ...

 - Integrate the various tables to get one struct per register
 - Get rid of needless per-register dynamic allocation
 - Double check list of registers:
    * Remove sixteen (!) non-registers for data comparators
    * Remove four registers that imply newer ETM than we support
    * Change some names to match current architecture specs
 - Handle more register info
    * some are write-only
    * some are read-only
    * record which versions have them, just in case
 - Reorganize the registers to facilitate removing the extras
    * group e.g. comparator/counter #N registers together
    * add and use lookup-by-ID


git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
dbrownell
2009-09-23 09:16:00 +00:00
parent a6d858ebcd
commit d9ce8a2f60
2 changed files with 176 additions and 167 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
src/target/etm.h
View File

@@ -29,43 +29,52 @@
struct image_s;
/* ETM registers (V1.3 protocol) */
/* ETM registers (JTAG protocol) */
enum
{
ETM_CTRL = 0x00,
ETM_CONFIG = 0x01,
ETM_TRIG_EVENT = 0x02,
ETM_MMD_CTRL = 0x03,
ETM_ASIC_CTRL = 0x03,
ETM_STATUS = 0x04,
ETM_SYS_CONFIG = 0x05,
ETM_TRACE_RESOURCE_CTRL = 0x06,
ETM_TRACE_EN_CTRL2 = 0x07,
ETM_TRACE_EN_EVENT = 0x08,
ETM_TRACE_EN_CTRL1 = 0x09,
/* optional FIFOFULL */
ETM_FIFOFULL_REGION = 0x0a,
ETM_FIFOFULL_LEVEL = 0x0b,
/* viewdata support */
ETM_VIEWDATA_EVENT = 0x0c,
ETM_VIEWDATA_CTRL1 = 0x0d,
ETM_VIEWDATA_CTRL2 = 0x0e,
ETM_VIEWDATA_CTRL2 = 0x0e, /* optional */
ETM_VIEWDATA_CTRL3 = 0x0f,
/* N pairs of ADDR_{COMPARATOR,ACCESS} registers */
ETM_ADDR_COMPARATOR_VALUE = 0x10,
ETM_ADDR_ACCESS_TYPE = 0x20,
/* N pairs of DATA_COMPARATOR_{VALUE,MASK} registers */
ETM_DATA_COMPARATOR_VALUE = 0x30,
ETM_DATA_COMPARATOR_MASK = 0x40,
ETM_COUNTER_INITAL_VALUE = 0x50,
/* N quads of COUNTER_{RELOAD_{VALUE,EVENT},ENABLE,VALUE} registers */
ETM_COUNTER_RELOAD_VALUE = 0x50,
ETM_COUNTER_ENABLE = 0x54,
ETM_COUNTER_RELOAD_VALUE = 0x58,
ETM_COUNTER_RELOAD_EVENT = 0x58,
ETM_COUNTER_VALUE = 0x5c,
ETM_SEQUENCER_CTRL = 0x60,
/* 6 sequencer event transitions */
ETM_SEQUENCER_EVENT = 0x60,
ETM_SEQUENCER_STATE = 0x67,
/* N triggered outputs */
ETM_EXTERNAL_OUTPUT = 0x68,
/* N task contexts */
ETM_CONTEXTID_COMPARATOR_VALUE = 0x6c,
ETM_CONTEXTID_COMPARATOR_MASK = 0x6f,
};
typedef struct etm_reg_s
{
int addr;
uint32_t value;
const struct etm_reg_info *reg_info;
arm_jtag_t *jtag_info;
} etm_reg_t;