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target: cortex_a: support read and write watchpoints

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The current code for cortex_a watchpoint sets the field DBGWCR:LSC
to '3', that corresponds to 'access' watchpoint.
Thus, any 'r' or 'w' watchpoint is considered to 'a'.

Convert the enum watchpoint_rw to the corresponding values for the
field DBGWCR:LSC.

Change-Id: Iccfddb3e34f3f26927983f3b00d9d5f81b06eb21
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9291
Tested-by: jenkins
This commit is contained in:
Antonio Borneo
2025-12-09 09:35:06 +01:00
parent 0eecf4d21d
commit e39ae004b0
1 changed files with 16 additions and 1 deletions
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17
src/target/cortex_a.c
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@@ -1769,7 +1769,6 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
uint32_t address;
uint8_t address_mask;
uint8_t byte_address_select;
uint8_t load_store_access_control = 0x3;
struct cortex_a_common *cortex_a = target_to_cortex_a(target);
struct armv7a_common *armv7a = &cortex_a->armv7a_common;
struct cortex_a_wrp *wrp_list = cortex_a->wrp_list;
@@ -1827,6 +1826,22 @@ static int cortex_a_set_watchpoint(struct target *target, struct watchpoint *wat
break;
}
uint8_t load_store_access_control;
switch (watchpoint->rw) {
case WPT_READ:
load_store_access_control = 1;
break;
case WPT_WRITE:
load_store_access_control = 2;
break;
case WPT_ACCESS:
load_store_access_control = 3;
break;
default:
LOG_ERROR("BUG: watchpoint->rw neither read, write nor access");
return ERROR_FAIL;
};
watchpoint_set(watchpoint, wrp_i);
control = (address_mask << 24) |
(byte_address_select << 5) |