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Support for Freescale LS102x SAP

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The SAP in LS102x SoC's from Freescale is able to read and write to all
physical memory locations, independently of CPU cores and DAP.

This implementation is 100% based on reverse-engineering of JTAG
communication with an LS1021A SAP using a JTAG debugger with SAP support.

And as such, this code is for now "works-for-me", pending verification
by other OpenOCD users, or even better, actual information from Freescale
on the SAP interface.

Change-Id: Ibb30945e017894da5c402f9f633fc513bed4e68c
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3096
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is contained in:
Esben Haabendal
2015-11-10 11:44:29 +01:00
committed by Paul Fertser
parent 406f4d1c68
commit f906c65fed
5 changed files with 250 additions and 2 deletions
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2
src/target/target.c
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@@ -90,6 +90,7 @@ extern struct target_type cortexm_target;
extern struct target_type cortexa_target;
extern struct target_type cortexr4_target;
extern struct target_type arm11_target;
extern struct target_type ls1_sap_target;
extern struct target_type mips_m4k_target;
extern struct target_type avr_target;
extern struct target_type dsp563xx_target;
@@ -120,6 +121,7 @@ static struct target_type *target_types[] = {
&cortexa_target,
&cortexr4_target,
&arm11_target,
&ls1_sap_target,
&mips_m4k_target,
&avr_target,
&dsp563xx_target,