forked from auracaster/openocd
- Fixes '[|]' whitespace
- Replace ')\([|]\)(' with ') \1 ('.
- Replace ')\([|]\)\(\w\)' with ') \1 \2'.
- Replace '\(\w\)\([|]\)(' with '\1 \2 ('.
- Replace '\(\w\)\([|]\)\(\w\)' with '\1 \2 \3'.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2374 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
@@ -346,7 +346,7 @@ static uint32_t stellaris_get_flash_status(flash_bank_t *bank)
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target_t *target = bank->target;
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uint32_t fmc;
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target_read_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, &fmc);
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target_read_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, &fmc);
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return fmc;
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}
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@@ -360,9 +360,9 @@ static void stellaris_read_clock_info(flash_bank_t *bank)
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uint32_t rcc, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
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unsigned long mainfreq;
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target_read_u32(target, SCB_BASE|RCC, &rcc);
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target_read_u32(target, SCB_BASE | RCC, &rcc);
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LOG_DEBUG("Stellaris RCC %" PRIx32 "", rcc);
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target_read_u32(target, SCB_BASE|PLLCFG, &pllcfg);
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target_read_u32(target, SCB_BASE | PLLCFG, &pllcfg);
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LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
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stellaris_info->rcc = rcc;
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@@ -412,7 +412,7 @@ static void stellaris_set_flash_mode(flash_bank_t *bank,int mode)
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uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
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LOG_DEBUG("usecrl = %i",(int)(usecrl));
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target_write_u32(target, SCB_BASE|USECRL, usecrl);
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target_write_u32(target, SCB_BASE | USECRL, usecrl);
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}
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#if 0
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@@ -439,7 +439,7 @@ static int stellaris_flash_command(struct flash_bank_s *bank,uint8_t cmd,uint16_
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target_t *target = bank->target;
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fmc = FMC_WRKEY | cmd;
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target_write_u32(target, FLASH_CONTROL_BASE|FLASH_FMC, fmc);
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target_write_u32(target, FLASH_CONTROL_BASE | FLASH_FMC, fmc);
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LOG_DEBUG("Flash command: 0x%x", fmc);
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if (stellaris_wait_status_busy(bank, cmd, 100))
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@@ -460,10 +460,10 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
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int i;
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/* Read and parse chip identification register */
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target_read_u32(target, SCB_BASE|DID0, &did0);
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target_read_u32(target, SCB_BASE|DID1, &did1);
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target_read_u32(target, SCB_BASE|DC0, &stellaris_info->dc0);
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target_read_u32(target, SCB_BASE|DC1, &stellaris_info->dc1);
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target_read_u32(target, SCB_BASE | DID0, &did0);
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target_read_u32(target, SCB_BASE | DID1, &did1);
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target_read_u32(target, SCB_BASE | DC0, &stellaris_info->dc0);
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target_read_u32(target, SCB_BASE | DC1, &stellaris_info->dc1);
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LOG_DEBUG("did0 0x%" PRIx32 ", did1 0x%" PRIx32 ", dc0 0x%" PRIx32 ", dc1 0x%" PRIx32 "",
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did0, did1, stellaris_info->dc0, stellaris_info->dc1);
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@@ -503,7 +503,7 @@ static int stellaris_read_part_info(struct flash_bank_s *bank)
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stellaris_info->pagesize = 1024;
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bank->size = 1024 * stellaris_info->num_pages;
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stellaris_info->pages_in_lockregion = 2;
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target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
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target_read_u32(target, SCB_BASE | FMPPE, &stellaris_info->lockbits);
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/* provide this for the benefit of the higher flash driver layers */
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bank->num_sectors = stellaris_info->num_pages;
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@@ -597,7 +597,7 @@ static int stellaris_erase(struct flash_bank_s *bank, int first, int last)
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/* Clear and disable flash programming interrupts */
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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target_write_u32(target, FLASH_MISC, PMISC | AMISC);
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for (banknr = first; banknr <= last; banknr++)
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{
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@@ -672,10 +672,10 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
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/* Clear and disable flash programming interrupts */
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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target_write_u32(target, FLASH_MISC, PMISC | AMISC);
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LOG_DEBUG("fmppe 0x%" PRIx32 "",fmppe);
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target_write_u32(target, SCB_BASE|FMPPE, fmppe);
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target_write_u32(target, SCB_BASE | FMPPE, fmppe);
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/* Commit FMPPE */
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target_write_u32(target, FLASH_FMA, 1);
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/* Write commit command */
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@@ -698,7 +698,7 @@ static int stellaris_protect(struct flash_bank_s *bank, int set, int first, int
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return ERROR_FLASH_OPERATION_FAILED;
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}
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target_read_u32(target, SCB_BASE|FMPPE, &stellaris_info->lockbits);
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target_read_u32(target, SCB_BASE | FMPPE, &stellaris_info->lockbits);
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return ERROR_OK;
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}
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@@ -869,7 +869,7 @@ static int stellaris_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t
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/* Clear and disable flash programming interrupts */
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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target_write_u32(target, FLASH_MISC, PMISC | AMISC);
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/* multiple words to be programmed? */
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if (words_remaining > 0)
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@@ -1014,7 +1014,7 @@ static int stellaris_mass_erase(struct flash_bank_s *bank)
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/* Clear and disable flash programming interrupts */
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target_write_u32(target, FLASH_CIM, 0);
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target_write_u32(target, FLASH_MISC, PMISC|AMISC);
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target_write_u32(target, FLASH_MISC, PMISC | AMISC);
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target_write_u32(target, FLASH_FMA, 0);
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target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
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