Resolve a "FIX" comment; yes that was superfluous given that the
JTAG core does that check by default. It was also buggy since it
wrote to a stack frame that went away before the write happened!!
Other fixes: remove pointless malloc(); zero-init scan_field_t
values wherever they appear; whitespace scrub; spelling fix.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Load the XScale debug handler from the read-only data section
instead of from a separate file that can get lost or garbaged.
This eliminates installation and versioning issues, and also
speeds up reset handling a bit.
Plus some minor bits of cleanup related to loading that handler:
comments about just what this handler does, and check fault codes
while writing it into the mini-icache.
The only behavioral changes should be cleaner failure modes after
errors during handler loading, and being a bit faster.
NOTE: presumes GNU assembly syntax, with ".incbin"; and ELF,
because of the syntax of the ".size" directive.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Streamline/shrink some needless JTAG stuff:
- Use #defines for the JTAG instructions; they can't ever change
- Remove an unused (!) shadow of tap->ir_length
- Stop using a copy of target->tap
- Don't bother saving the variant after sanity checking ir_length
Also, make target_create() work as on other targets: build the
register cache later, making init_target() no longer be a NOP.
Handle malloc failure; remove a comment that was obsoleted by the
not-so-new target syntax.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove unused and deprecated (in the arch spec) mode for loading
code into the *main* icache (vs the "mini" icache). Disable some
extremely noisy (and rarely useful) low-level debug messages
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Declare almost everything as static.
Move stuff to remove most forward references.
Remove most forward declarations.
Warn if the unimplemented register functions get called.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Just fill out the rest of the cache line with NOPs; don't change
the record of how much data we consumed. Otherwise the count of
how much data is left can roll over from positive to negative
("VERY positive") and skip the loop termination of zero.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add a header comment referencing useful XScale specs.
Make most data static, and the tables readonly.
Scrub extra blank lines.
Return fault codes from one routine.
Remove a needless NOP methood.
(BUGFIX) When we update R0, mark R0 as dirty/valid ... not R15/PC!
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Observed:
openocd: core.c:318: jtag_checks: Assertion `jtag_trst == 0' failed.
The issue was that nothing disabled background polling during calls
from the TCL shell to "jtag_reset 1 1". Fix by moving the existing
poll-disable mechanism to the JTAG layer where it belongs, and then
augmenting it to always pay attention to TRST and SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
- revert to previous default: don't talk JTAG during SRST
- add "srst_nogates" flag, the converse of "srst_gates_jtag"
- with no args, display the current configuration
And update the User's Guide text with bullet lists to be a bit more clear.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- don't needlessly export this function
- handle "case 0" debug method-of-entry better (silent by default)
The "case 0" is a valid debug entry mode so it doesn't deserve the
warning int now gets. But it probably means that OpenOCD confused
itself somehow; or that it confused the ARM9EJS target.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2799 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- ETB
* report _actual_ hardware status, not just expected status
* add a missing diagnostic on a potential ETB setup error
* prefix any diagnostics with "ETB"
- ETM
* make "etm status" show ETM hardware status too, instead of
just traceport status (which previously was fake, sigh)
- Docs
* flesh out "etm tracemode" docs a bit
* clarify "etm status" ... previously it was traceport status
* explain "etm trigger_percent" as a *traceport* option
ETM+ETB tracing still isn't behaving, but now I can see that part of
the reason is that the ETB turns itself off almost immediately after
being enabled, and before collecting any data.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Commands were supposed to have been "arm11 memwrite ..."
not "memwrite ..."
- Get rid of obfuscatory macros
- Re-alphabetize
- Add docs for "arm11 vcr"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2776 b42882b7-edfa-0310-969c-e2dbd0fdcd60
only expose the registers which are actually present. They
could be missing for two basic reasons:
- This version might not support them at all; e.g. ETMv1.1
doesn't have some control/status registers. (My sample of
ARM9 boards shows all with ETMv1.3 support, FWIW.)
- The configuration on this chip may not populate as many
registers as possible; e.g. only two data value comparators
instead of eight.
Includes a bugfix in the "etm info" command: only one of the
two registers is missing on older silicon, so show the first
one before bailing.
Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled. Also, give some examples of the kinds of
constrained trace which could be arranged.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
system, removes 20 non-existent registers ... but still includes
over 45 (!) ETM registers which don't even exist there ...
- Integrate the various tables to get one struct per register
- Get rid of needless per-register dynamic allocation
- Double check list of registers:
* Remove sixteen (!) non-registers for data comparators
* Remove four registers that imply newer ETM than we support
* Change some names to match current architecture specs
- Handle more register info
* some are write-only
* some are read-only
* record which versions have them, just in case
- Reorganize the registers to facilitate removing the extras
* group e.g. comparator/counter #N registers together
* add and use lookup-by-ID
git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add a header comment
- Line up the ETM context struct, pack it a bit
- Remove unused context_id (this doesn't support ETMv2 yet)
- Make most functions static
- Remove unused string table and other needless lines of code
- Correct "tracemode" helptext
Also provide and use an etm_reg_lookup() to find entries in the ETM
register cache. This will help cope with corrected contents of that
cache, which doesn't include entires for non-existent registers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Shrink messaging during resets, primarily by getting rid of
"nothing happened" noise that hides *useful* information.
- Improve: the "no IDCODE" message by identifying which tap only
supports BYPASS; and the TAP event strings.
Related minor code updates:
- Remove two needless tests when examining the chain: we know
we have a TAP, and that all TAPs have names.
- Clean up two loops, turning "while"s into "for"s which better
show what's actually being done.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2736 b42882b7-edfa-0310-969c-e2dbd0fdcd60
and Tcl/external):
- Reorder so *both* paths (TCK/TMS or TRST) can enable TAPs with
ICEpick ... first C code flags TAPs that got disabled, then call
any Tcl code that might want to re-enable them.
- Always call the C/internal handlers when JTAG operations can be
issued; previously that wasn't done when TRST was used.
Plus some small cleanups (whitespace, strings, better messaging
during debug and on some errors) to reset-related code.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2730 b42882b7-edfa-0310-969c-e2dbd0fdcd60
