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c4bcb0b95a8d3ee9baf7046b6768976d8a4eb134
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1905 Commits

Author SHA1 Message Date
Rodrigo L. Rosa
c4bcb0b95a cleanup flash module command 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
d539fc856f fix read for verify_image 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
f42353d821 fix read speed improved by queueing commands 2011-06-12 11:18:27 +02:00
Rodrigo L. Rosa
f4a3db0d4a fix flash driver size, sector erase 2011-06-12 11:18:27 +02:00
Freddie Chopin
1cfb2287a6 Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - leftover changes 2011-06-07 17:53:33 +02:00
Stefan Mahr
5d9b7cdd2b mips: add nor flash write from memory block 2011-06-05 22:45:21 +02:00
Rodrigo L. Rosa
c989de0cea crc check on flashed data 2011-06-04 09:52:14 +02:00
Rodrigo L. Rosa
d09bef2622 code cleanup 2011-06-04 09:52:14 +02:00
Freddie Chopin
f499bab698 Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - dubious fixes 2011-06-04 09:46:48 +02:00
Freddie Chopin
f6315d5e5b Fix "unused variable" warnings (errors) detected with GCC 4.7.0 - trivial fixes 2011-06-04 09:35:13 +02:00
Stefan Mahr
796086cd49 mips: fixup fastdata 
fixup fastdata
 2011-06-01 07:23:42 +02:00
Stefan Mahr
524d79ebe7 mips: fix some more endian madness 2011-06-01 07:23:35 +02:00
Stefan Mahr
875298bc53 mips: fix swapping if running on big endian host 2011-05-29 23:21:23 +02:00
Stefan Mahr
73988aea1f mips: fix swapping if openocd is running on big endian host 2011-05-28 14:25:06 +02:00
Spencer Oliver
5d7d08a1f0 dsp5680xx: whitespace cleanup 
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
 2011-05-23 10:23:34 +01:00
Spencer Oliver
d16b0ea6d4 Fix build issue under cygwin 
cygwin does not define sleep, so use our internal win32 version.
caused by commit 9d4aec6bda

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
 2011-05-23 10:22:12 +01:00
Rodrigo L. Rosa
ef599aebfd flashing speed improved using queued jtag. error propagation improved. 2011-05-19 07:27:02 +02:00
Rodrigo L. Rosa
9d4aec6bda partial support for 568013 and 568037, target integration. 2011-05-18 18:47:50 +02:00
Jie Zhang
7d8053e93f Remove useless MIPS code in avr32_ap7k.c. 2011-05-03 21:59:08 +02:00
Michel Jaouen
5578935eff cortex_a : smp support 
Conflicts:

	src/target/cortex_a.c
 2011-04-28 12:22:29 +02:00
Michel Jaouen
b778b36f29 smp : infra for smp minimum support 2011-04-28 12:22:10 +02:00
Broadcom Corporation (Evan Hunter)
b69119668e RTOS Thread awareness support wip 
- works on Cortex-M3 with ThreadX and FreeRTOS

Compared to original patch a few nits were fixed:

- remove stricmp usage
- unsigned compare fix
- printf formatting fixes
- fixed a bug with overrunning a memory buffer allocated with malloc.
 2011-04-15 08:24:18 +02:00
Luca Ellero
ecd5e5de7f Replace byte-access to memory with faster word-access 
Freescale iMX53 doesn't seem to like unaligned accesses to his memory
mapped registers.
Anyway this patch makes dump_image/load_image 4X faster for every
access through APB.

Signed-off-by: Luca Ellero <lroluk@gmail.com>
 2011-04-13 21:33:11 +02:00
Luca Ellero
81f238f522 Add opcodes for load/store registers words immediate post-indexed 
Signed-off-by: Luca Ellero <lroluk@gmail.com>
 2011-04-13 21:32:24 +02:00
Michel JAOUEN
08303f10aa cortex_a :apb mem read/write working with mmu_on 
Conflicts:

	src/target/cortex_a.c
 2011-04-13 10:57:02 +02:00
Michel JAOUEN
28ddd16ddc cortex_a : multiple target on the same dap 2011-04-13 10:56:52 +02:00
Michel JAOUEN
a7844aa4e8 cortex_a : use dap ref from armv4_5common 2011-04-13 10:56:42 +02:00
Michel JAOUEN
5e86c5173c cortex_a : implement jtag console for cortex_a 2011-04-06 06:45:39 +02:00
Drasko DRASKOVIC
719f9ecde3 Added mips_ejtag_drscan_32_out() for optimization. 2011-04-05 08:21:29 +02:00
Drasko DRASKOVIC
bc9afcd4d1 Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check that PrAcc is "1" before FASTDATA access. 2011-04-05 08:21:25 +02:00
Drasko DRASKOVIC
b125689459 Added correct endianess treatment for big endian targets. Now it is possible to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times). 2011-04-05 08:21:17 +02:00
Øyvind Harboe
a1d9f16320 cortex_a: delete dbgbase hack vestiges 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-04-01 21:00:44 +02:00
Michel JAOUEN
930d70f1a3 cortex_a: fix gaffe in first implementation of -dbgbase 2011-04-01 18:59:02 +02:00
Øyvind Harboe
3b7c9585db Merge remote branch 'origin/master' into HEAD 2011-04-01 13:02:24 +02:00
Øyvind Harboe
a0b83e82f7 mips: fix gaffe in previous commit 
accidentally invoked return jtag_execute_queue() in the
middle of a fn. Hmm.... I would have expected gcc or
at least lint to catch this.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-04-01 12:32:41 +02:00
Øyvind Harboe
977df18f50 cortex_a: remove broken dbgbase patchup code 
the patchup code would get false positives when checking
whether a dbgbase had to be corrected.

The solution is to have autodetect default, with manual override
in scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-04-01 10:00:41 +02:00
Øyvind Harboe
378567da4e mips: illustrates how to improve performance 
Do not require unecessary roundtrips for clocking out
data.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-04-01 08:59:11 +02:00
Øyvind Harboe
2615bf4398 types: write memory now uses const 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-04-01 08:59:07 +02:00
Øyvind Harboe
d76fd2aac7 mips: delete kludgy code that modifies data sent to write_memory() 
Could this cause confusion as data sent to write would be flipped
and then if the caller subsequently used the data, e.g. a
compare mismatch might happen?

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 23:46:56 +02:00
Øyvind Harboe
0c1ebf2673 mips: mips32_pracc_exec error propagation fixes 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 23:46:56 +02:00
Øyvind Harboe
83ab5ad240 mips: mips_ejtag_get_impcode error propagation added 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 23:46:56 +02:00
Øyvind Harboe
667c65552e mips: fix mips_ejtag_set_instr error handling 
this fn does not fail, it queues data.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 23:36:45 +02:00
Øyvind Harboe
e1f5055bb0 mips: fix error handling for jtag_execute_queue() 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 23:08:53 +02:00
Øyvind Harboe
f169f86bd1 xscale: fix gaffe in phys write 
it would *read* instead of *write* to memory
when the MMU was disabled.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 18:46:14 +02:00
Øyvind Harboe
8d338f3296 cortex-a: use -dbgbase option 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 09:30:48 +02:00
Øyvind Harboe
b75bdb7b04 target: add -dbgbase option to target configuration 
Really a Cortex-A specific option, but there is no
system in place to support target specific options
currently and there has been no need for such a system
until now.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-31 09:30:48 +02:00
Andrew Lyon
be14e8cbb0 bugfix for step <address> mips_m4k 
The patch below fixes step <address> on mips_m4k.

Spencer Oliver <spen@spen-soft.co.uk>:

The current code is used on all other arch's - is
there a underlying issue with those aswell ?
 2011-03-29 12:50:54 +02:00
Øyvind Harboe
dec80e1cff cortex_a: rename cortex_a8.c/h to cortex_a.c/h 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-22 11:29:10 +01:00
Øyvind Harboe
a843789ede omap4430: tried to add in workaround for broken dbgbase query 
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-22 09:21:16 +01:00
Øyvind Harboe
fc574c64bb cortex a9: merge cortex a9 and a8 code 
better to keep this in a single file.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
 2011-03-22 09:10:21 +01:00