Commit Graph

112 Commits

Author SHA1 Message Date
Antonio Borneo
ddef9cf73b target: align switch and case statements
The coding style requires the 'case' to be at the same indentation
level of its 'switch' statement.

Align the code accordingly.

While there:
- add space around the operators;
- drop useless empty line.

Skip all riscv code, as it is going to be updated soon from the
external fork.

No changes are reported by
	git log -p -w --ignore-blank-lines --patience

Change-Id: I2691dfdd2b6734143e14160b46183623e9773539
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9051
Tested-by: jenkins
2025-09-06 11:41:33 +00:00
Antonio Borneo
003cb92cd5 openocd: drop empty string suffix from format strings
Format strings are often split to allow using the conversion
specifiers macros from <inttypes.h>.
When the format string ends with one of such macros, there is no
need to add an empty string "" after the macro.

In current code we have 203 cases of empty string present, against
1159 cases of string ending with the macro.

Uniform the style across OpenOCD by removing the empty string.

Don't modify the files 'angie.c' and 'max32xxx.c' as they are
already changed by other independent commits.

Change-Id: I23f1120101ce1da67c6578635fc6507a58c803e9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/9065
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2025-08-09 15:04:46 +00:00
Marc Schink
297844cf46 target: Use 'bool' data type in target_{step,resume}
While at it, adapt data types of related functions and fix some coding
style issues.

Change-Id: I74db9258fc17b1ee8aa446f35ae722ea7c2f67e6
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8524
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2025-02-22 18:37:01 +00:00
Antonio Borneo
3099547069 OpenOCD: fix code indentation
Fix checkpatch errors

	ERROR:SUSPECT_CODE_INDENT: suspect code indent for
	conditional statements

Change-Id: I94d4fa5720c25dd2fb0334a824cd9026babcce4e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8497
Tested-by: jenkins
2025-01-25 10:31:06 +00:00
Antonio Borneo
e72733d590 target: convert 'unsigned' to 'unsigned int'
Conversion done with
	checkpatch --fix-inplace -types UNSPECIFIED_INT

Ignore the cast as they could be better addressed.
Fix only minor additional checkpatch issue (spacing and line
length).

Use Checkpatch-ignore below for the function pointers in the file
'armv7a_cache_l2x.h' that do not assign the identifier names to
the function arguments.
Most of these struct are unused and should be fixed or dropped.

Checkpatch-ignore: FUNCTION_ARGUMENTS

Change-Id: I8f27e68eb3502e431c1ba801b362358105f9f2dc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8480
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2024-10-05 15:45:34 +00:00
Walter Ji
00ee9b09d9 target/mips32: add dsp access support for gdb
Change order of dsp register name array and removed hi0 and lo0
to comply with gdb definition of dsp in mips-dsp.xml, the regs
name array is now mapping corresponding dsp accumulator names
onto `mips32_regs` and `core_regs` instead of mapping to instr
arrays in dsp functions.
feature now requires a place to store cached dsp registers.
Add dsp registers to reg_list for gdb to access them.
Add dsp module enable detection to avoid DSP Disabled exception
while reading dsp accumulators.
Add dsp register reading procedure in `mips32_pracc_read_regs`
and writing procedure in `mips32_pracc_write_regs`.

Change-Id: Iacc335da030ab85989922c81aac7925b3dc17459
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8476
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-10-05 15:43:03 +00:00
Walter Ji
47d983a77a target/mips32: fix clang sbuild check fail
Initialized `value` variables that could only be set in a branch.

Change-Id: Iec7413ade9d053c93352a58ff954ad49a6545923
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8179
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-04-07 19:36:49 +00:00
Walter Ji
01a797af14 target/mips32: add fpu access support
Add access to fpr and cp1 registers.
GDB can now check the FPRs with `info reg f` and change them.
Checkpatch-ignore: MACRO_ARG_REUSE

Change-Id: I63896ab6f6737054d8108db105a13a58e1446fbc
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7866
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-16 14:47:16 +00:00
Walter Ji
561ea48d83 target/mips32: add dsp access support
Add access to dsp registers and a command for dsp related operations.
Checkpatch-ignore: MACRO_ARG_REUSE

Change-Id: I30aec0b9e4984896965edb1663f74216ad41101e
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7867
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-03-09 11:08:21 +00:00
Antonio Borneo
c47d77780c target/mips32: fix false positive from clang
clang build triggers an error for an uninitialized value of the
variable 'instr'.
This is a false positive, as the macro
 #define MIPS32_CONFIG3_ISA_MASK (3 << MIPS32_CONFIG3_ISA_SHIFT)
guarantees the switch/case already covers all the possible values
with cases 0, 1, 2 and 3.

Silent clang by adding a useless default case to the switch.
While there, fix the indentation of the switch/case accordingly to
OpenOCD coding style.

Change-Id: I0ae316754ce7d091dd8366bf314b8e6ee780e313
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 7de4b1202d ("target/mips32: add cpu info detection")
Reviewed-on: https://review.openocd.org/c/openocd/+/8065
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-01-13 14:45:56 +00:00
Walter Ji
b123128737 target/mips32: optimize pracc access
Update mips32 instructions, add barrier and sync related insts.
Add SYNC and barrier instruction blocks for memory access safety.

These instructions are not supported on Lexra and/or MIPSr1 CPUs,
detections were added and they will be executed conditionally.

Rework mips32_pracc_read/write_regs function.
Checkpatch-ignore: MACRO_ARG_REUSE

Change-Id: Ib14112f37ff1f060b1633df73d671a6b09bb2178
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7865
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2024-01-06 13:52:02 +00:00
Walter Ji
019bf5f83c target/mips32: add mips ejtag command
Add mips32 ejtag_reg command for inspecting ejtag status.
Add description for mips32 ejtag_reg command.

Change-Id: Icd173d3397d568b0c004a8cc3f45518d7b48ce43
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7906
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2024-01-06 13:51:44 +00:00
Walter Ji
b2172ed7d7 target/mips32: update coprocessor 0 command
Update mips32 cp0 command, it accepts cp0 reg names now.
Updated mips32 cp0 description.

Change-Id: Ib23dd13519def77a657c9c5bb039276746207b9b
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7905
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2024-01-06 13:51:26 +00:00
Walter Ji
7de4b1202d target/mips32: add cpu info detection
Add detection for mips cpu types by using prid.
Add cpuinfo command for inspecting more verbose info.
Add MIPS Architecture specs in openocd docs.

Change-Id: I28573b7c51783628db986bad0e226dcc399b4fa6
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7912
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2024-01-06 13:50:46 +00:00
Walter Ji
d209598ce9 target/mips32: update mips32 config register parsing
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA,
DSP, and FPU features, allowing user to get more detailed
target information.
Most of these information will be used in MIPS m/iAptiv support.

Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7911
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-11-11 18:04:19 +00:00
Walter Ji
e887cfb9e8 target/mips32: check read regs result in save context
Add result check for mips32_pracc_read_regs in mips32_save_context.

Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:34:00 +00:00
Walter Ji
18c64af135 target/mips32: rework mips core register related functions
Update mips core definitions.
Reworked mips core register structure and read/write function.
Add coprocessor0 register definitions for target configuration.

Change-Id: I59c1f4cc4020db8a78e8d79f7421b87382fa1709
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7864
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:33:10 +00:00
Artur Rojek
3b38226370 mips32: add per-cpu quirks feature
Introduce the ability to detect CPUs based on CP0 PRId register and
apply cpu specific quirks, which alter the default ejtag behavior.

First of those is EJTAG_QUIRK_PAD_DRET, which makes sure extra NOPs are
placed after the DRET instruction on exit from debug mode. This fixes
resume behavior on Ingenic JZ4780 SoC.

The proper detection of some (currently unsupported) CPUs becomes quite
complicated, so please consult the following Linux kernel code when
adding new CPUs:
* arch/mips/include/asm/cpu.h
* arch/mips/kernel/cpu-probe.c

Change-Id: I0f413d5096cd43ef346b02cea85024985b7face6
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7859
Tested-by: jenkins
2023-08-26 11:44:50 +00:00
Tomas Vanek
a5108240f9 target: fix messages and return values of failed op because not halted
Lot of messages was logged as LOG_WARNING, but the operation failed
immediately. Sometimes no error message was logged at all.
Add missing messages, change warnings to errors.

Sometimes ERROR_TARGET_INVALID was returned. Some command handlers
returned ERROR_OK! Always return ERROR_TARGET_NOT_HALTED.

While on it use LOG_TARGET_ERROR() whenever possible.
Prefix command_print() message with 'Error:' to get closer
to LOG_TARGET_ERROR() variant.

Error message was not added to get() and set() methods of
struct xxx_reg_type - the return value is properly checked and a message
is logged by the caller in case of ERROR_TARGET_NOT_HALTED.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I2fe4187c6025f0038956ab387edbf3f461c69398
Reviewed-on: https://review.openocd.org/c/openocd/+/7819
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-07-29 05:17:44 +00:00
Antonio Borneo
da76f8f0b4 target: use unsigned int for timeout_ms
Change the prototype of functions:
- target_run_algorithm()
- target_wait_algorithm()
- target_wait_state()
- struct target_type::run_algorithm()
- struct target_type::wait_algorithm()
to use unsigned int for timeout_ms instead of int.
Change accordingly the variables passed as parameter.

Change-Id: I0b8d6e691bb3c749eeb2911dc5a86c38cc0cb65d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7562
Tested-by: jenkins
2023-05-27 06:41:17 +00:00
Antonio Borneo
382148e4dd openocd: fix SPDX tag format for files .c
With the old checkpatch we cannot use the correct format for the
SPDX tags in the file .c, in fact the C99 comments are not allowed
and we had to use the block comment.

With the new checkpatch, let's switch to the correct SPDX format.

Change created automatically through the command:
	sed -i \
	's,^/\* *\(SPDX-License-Identifier: .*[^ ]\) *\*/$,// \1,' \
	$(find src/ contrib/ -name \*.c)

Change-Id: I6da16506baa7af718947562505dd49606d124171
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7153
Tested-by: jenkins
2022-09-18 08:22:01 +00:00
Antonio Borneo
057e566097 openocd: src/target: replace the GPL-2.0-or-later license tag
Replace the FSF boilerplate with the SPDX tag.

The SPDX tag on files *.c is incorrect, as it should use the C99
single line comment using '//'. But current checkpatch doesn't
allow C99 comments, so keep using standard C comments, by now.

Change-Id: I255ad17235ff1e01bf0aa4deed4d944e1d693ddb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7071
Tested-by: jenkins
2022-07-23 13:58:51 +00:00
Marc Schink
da770c4fbb Use boolean argument for register_get_by_name()
Change-Id: Ie913630c6ab3b600532d8e375e2fc11ca202cf5e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/6295
Tested-by: jenkins
Reviewed-by: Jan Matyas <matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-06-18 23:14:27 +01:00
Antonio Borneo
99add6227f target: use proper format with uint32_t
Modify the format strings to properly handle uint32_t data types.

While there, fix prototype mismatch between header and C file of
the function armv7a_l1_d_cache_inval_virt().

Change-Id: I434bd241fa5c38e0c15d22cda2295097050067f5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5818
Tested-by: jenkins
2020-09-05 17:12:39 +01:00
Antonio Borneo
480ba8ca88 target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5766
Tested-by: jenkins
2020-07-26 23:09:45 +01:00
Antonio Borneo
e2315ccffd coding style: fix space separation
The checkpatch script from Linux kernel v5.1 complains about using
space before comma, before semicolon and between function name and
open parenthesis.
Fix them!

Issue identified using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SPACING -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: I1062051d7f97d59922847f5061c6d6811742d30e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5627
Tested-by: jenkins
2020-07-08 22:08:08 +01:00
Antonio Borneo
6cb5ba6f11 helper/command: change prototype of command_print/command_print_sameline
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should switch to CMD as
first parameter.

Change prototype of command_print() and command_print_sameline()
to pass CMD instead of CMD_CTX.
Since the first parameter is currently not used, the change can be
done though scripts without manual coding.
This patch is created using the command:
	sed -i PATTERN $(find src/ doc/ -type f)
with all the following patters:
	's/\(command_print(cmd\)->ctx,/\1,/'
	's/\(command_print(CMD\)_CTX,/\1,/'
	's/\(command_print(struct command_\)context \*context,/\1invocation *cmd,/'
	's/\(command_print_sameline(cmd\)->ctx,/\1,/'
	's/\(command_print_sameline(CMD\)_CTX,/\1,/'
	's/\(command_print_sameline(struct command_\)context \*context,/\1invocation *cmd,/'

This change is inspired by http://openocd.zylin.com/1815 from Paul
Fertser but is now done through scripting.

Change-Id: I3386d8f96cdc477e7a2308dd18269de3bed04385
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/5081
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-05-14 19:37:11 +01:00
Paul Fertser
42bc2051aa target/mips32: change prototype of mips32_verify_pointer()
To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of mips32_verify_pointer() to pass CMD instead of
CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: Ic4a4de10518ee009d6df420e7278fd028e1f22ca
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5062
Tested-by: jenkins
2019-05-14 19:34:56 +01:00
Marc Schink
8f518d3592 target/mips: Use 'bool' data type
Change-Id: Ifb114bfc062ed7c0ff6e4f37a1a6d546f5415344
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4970
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2019-03-14 14:20:35 +00:00
Jean-Christian de Rivaz
740c3ec238 target start_algorithm: Don't copy the IN mem_params fix uninitialised value.
Fix the write only out params TODO on armv7m.c
Fix conditional move depends on uninitialised value.
It was detected while programming a LPC8Nxx with a FTDI adapter.
valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes
[...]
==8696== Conditional jump or move depends on uninitialised value(s)
==8696==    at 0x16E4D3: buf_set_u32 (binarybuffer.h:52)
==8696==    by 0x16E4D3: ftdi_swd_queue_cmd (ftdi.c:1206)
==8696==    by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696==    by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696==    by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696==    by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696==    by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696==    by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696==    by 0x19D846: target_run_algorithm (target.c:814)
==8696==    by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==  Uninitialised value was created by a heap allocation
==8696==    at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696==    by 0x220EF9: init_mem_param (algorithm.c:30)
==8696==    by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==    by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696==    by 0x1B7D99: run_command (command.c:623)
==8696==    by 0x1B7D99: script_command_run (command.c:208)
==8696==    by 0x1B7FD9: command_unknown (command.c:1033)
==8696==    by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696==    by 0x2E3865: Jim_EvalObj (jim.c:10814)
==8696==
==8696== Conditional jump or move depends on uninitialised value(s)
==8696==    at 0x16E506: buf_set_u32 (binarybuffer.h:52)
==8696==    by 0x16E506: ftdi_swd_queue_cmd (ftdi.c:1207)
==8696==    by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696==    by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696==    by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696==    by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696==    by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696==    by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696==    by 0x19D846: target_run_algorithm (target.c:814)
==8696==    by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==  Uninitialised value was created by a heap allocation
==8696==    at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696==    by 0x220EF9: init_mem_param (algorithm.c:30)
==8696==    by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696==    by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696==    by 0x185BDF: flash_driver_erase (core.c:44)
==8696==    by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696==    by 0x18650D: flash_iterate_address_range (core.c:567)
==8696==    by 0x18732F: flash_erase_address_range (core.c:584)
==8696==    by 0x18732F: flash_write_unlock (core.c:928)
==8696==    by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696==    by 0x1B7D99: run_command (command.c:623)
==8696==    by 0x1B7D99: script_command_run (command.c:208)
==8696==    by 0x1B7FD9: command_unknown (command.c:1033)
==8696==    by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696==    by 0x2E3865: Jim_EvalObj (jim.c:10814)

Change-Id: I50f9a8c4516b686cf62ac3c76f47c53465e949da
Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4811
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-07 08:01:25 +00:00
Tomas Vanek
7a3eec2b4d target algo: do not write reg_param if direction is PARAM_IN
Without this change xxx_start_algorithm() writes all register
parameters no matter of their direction. It usually results
in writing of uninitialized reg_params[].value - possibly
reported by valgrind.

While on it fix the wrong parameter direction in
kinetis_disable_wdog_algo(). This bug did not have any
impact because of unconditional write of reg_params.

Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4813
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2019-02-07 07:51:50 +00:00
Tomas Vanek
eb8912ec38 target, flash: prepare infrastructure for multi-block blank check
'flash erase_check' command runs a check algorithm on a target
if possible. The algorithm is run repeatedly for each flash sector.
Unfortunately every start and stop of the algorithm impose not negligible
overhead.
In practice it means checking is faster than plain read only for
sectors of size approx 4 kByte or bigger. And checking sectors
as short as 512 bytes runs approx 4 times slower than plain read.

The patch changes API call target_blank_check_memory() and related
to take an array of sectors (or arbitrary memory blocks).

Changes in target-specific checking routines are kept minimal.
They use only the first block from the array and process it by
the unchanged algorithm.

default_flash_blank_check() routine repeats target_blank_check_memory()
until all blocks are checked, so it works with both multi-block
and single-block based checkers.

Change-Id: I0e6c60f2d71364c9c07c09416b04de9268807f5e
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4297
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2018-04-10 06:16:40 +01:00
Salvador Arroyo
4831ce4433 mips32: add micromips isa handling
Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:04:56 +01:00
Salvador Arroyo
f5151b6d46 mips32, convert miniprograms with code definition
Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:58 +01:00
Salvador Arroyo
2279c23cde mips32, add support for micromips in debug mode
Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2017-05-08 18:03:28 +01:00
Dongxue Zhang
47b8cf8420 target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.

In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.

Don't silently change gdb formatting here, leave that to later.

Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.

Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.

Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
2017-02-10 13:50:17 +01:00
Andreas Färber
eaacb900dd flash/nor: Add erased_value to drivers and pass it to targets
struct flash_driver has a default_padded_value field that is similar,
but it can be changed by the user for the specific purpose of padding.

Add a new erased_value field and initialize it for all targets,
particularly stm32lx, xmc4xxx and virtual.

Use this value in core.c:default_flash_mem_blank_check(), the slow path.

Extend the target API to pass erased_value down to target code.
Adding an argument ensures that we catch all callers.

This allows us to merge xmc4xxx.c:xmc4xxx_blank_check_memory() into
armv7m:armv7m_blank_check_memory().

It further allows us to use default_flash_blank_check() in place of
xmc4xxx.c:xmc4xxx_flash_blank_check(), adding a potential slow path
fallback, as well as stm32lx:stm32lx_erase_check(), adding the potential
armv7m fast path with fallback to default_flash_mem_blank_check().

Fix a mips32 code comment while at it (zeroed -> erased).

The armv4_5 and mips32 target implementations will now error out if an
erase value other than 0xff is used, causing default_flash_blank_check()
to fall back to the default_flank_mem_blank_check() slow path.

Change-Id: I39323fbbc4b71c256cd567e439896d0245d4745f
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3497
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2016-10-30 20:30:48 +00:00
Kent Brinkley
727f178ab9 mips: Added #define for scan_delay legacy mode default value
Believe in using defines to make maintenance easier.

Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2350
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
2016-10-04 11:41:34 +01:00
Marc Schink
d0e763ac7e Remove FSF address from GPL notices
Also make GPL notices consistent according to:
https://www.gnu.org/licenses/gpl-howto.html

Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3488
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2016-05-24 22:30:01 +01:00
Kent Brinkley
d5a2c0c10e Change isa string
Laying the ground work for adding microAptiv core

Change-Id: I161a8a8cb250240ebc8518c91e746d6f921c41c7
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2400
Tested-by: jenkins
Reviewed-by: Mindy Beseler <mbeseler@yahoo.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2016-02-13 23:06:56 +00:00
Antony Pavlov
fd43be0726 mips32: add gdb target description support
This commit is inspired by

    commit 1255b18fc6
    Author: Spencer Oliver <spen@spen-soft.co.uk>
    Date:   Fri Sep 13 09:44:36 2013 +0100

        armv7m: add gdb target description support

Change-Id: I75c3971fd0599d34ed49fb73975378b57f2a4af0
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
CC: Spencer Oliver <spen@spen-soft.co.uk>
CC: Oleksij Rempel <linux@rempel-privat.de>
CC: Paul Fertser <fercerpav@gmail.com>
CC: Gregory Fong <gregory.0xf0@gmail.com>
Reviewed-on: http://openocd.zylin.com/1972
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2015-02-11 22:11:19 +00:00
Antony Pavlov
3f447bb8dd mips32: use 'unsigned int' for CPU register indices
Change-Id: I77e94b2fe0943a87e1d18d88ebf2a0133aaad728
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2216
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2015-02-11 22:09:27 +00:00
Antony Pavlov
f16b7a6d7e mips32: fix typos
Change-Id: Ibb98fe3da68bf670a5bb83600bb49647db8a4163
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2338
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-11-24 22:22:53 +00:00
Oleksij Rempel
02ac60b000 mips32.c: cache debug caps and support EJTAG 2.0 specific changes
EJTAG v2.0 indicated some debug caps in IMP register.
V2.6 moved them to DCR register. To make it more universal,
convert this values and store them for later use.

Change-Id: Id6b9f47c9c2ea94d37281ebfcae5acf357261ddf
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1932
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-08-19 20:18:02 +00:00
Oleksij Rempel
c13ca4de40 mips32.c: fix IB and DB bits check for EJTAG v2.0
Change-Id: I4e28dddc1d5d9c2b923ae17beacdd7f73591b1d0
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1931
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-08-19 20:17:55 +00:00
Salvador Arroyo
e9497fbf75 mips: load code in buffer mode
Currently the functions mips32_checksum_memory() and mips32_blank_check_memory()
load the code word by word.
The bug in cache code is a good reason for doing so.
If there is no other reason we can load the code as a buffer to save time.
mips_m4k_write_memory() expect a buffer in target endianness, this is done by
target_buffer_set_u32_array().
Cleaned up exit code.
Tested on ar7241 big endian and pic32mx little endian with verify_image.
Flash erase check only tested in pic32mx.

Change-Id: Ib63ed98732b2e23b058e7349a0a57934b7604905
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1562
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-05-09 20:37:42 +00:00
Paul Fertser
151c31785a mips32, dsp563xx: fix segfault on Gdb attach
Since c6216201b2 gdb target description
generation support is enabled by default and it counts on checking
"feature" pointer in reg_list. Both mips32 and dsp563xx neither used
calloc nor explicitly set feature (as it was a newly introduced struct
field).

This patch changes all targets to use calloc for consistency.

Change-Id: I9eceadef8b04aacb108e24ae23cb51ca3009586f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2102
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-04-14 18:18:13 +00:00
Antony Pavlov
bc1340cf0b mips32: build register cache in a more clear way
This commit is inspired by armv7m_build_reg_cache().

Change-Id: I62b51b2a5f0fed788af167b6f8e60c09b53181be
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1943
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-02-24 12:10:29 +00:00
Paul Fertser
f132fcf636 Clean up many C99 integer types format specifiers
This eliminates most of the warnings reported when building for
arm-none-eabi (newlib).

Hsiangkai, there're many similar warnings left in your nds32 files, I
didn't have the nerve to clean them all, probably you could pick it
up.

Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31 20:40:03 +00:00
Hsiangkai Wang
d979d78e97 gdb_server: support gdb target description
* Add a parameter in .get_gdb_reg_list() to return different
  register lists as generating target description.
* Modify STRUCT REG to let gdb generate target description
  according to register information.

The modified structure of register is
struct reg {
        const char *name;
        uint32_t number;  /* for regnum="num" */
        struct reg_feature *feature;  /* for register group feature name */
        bool caller_save;  /* for save-restore="yes|no" */
        void *value;
        bool dirty;
        bool valid;
        bool exist;
        uint32_t size;
        struct reg_data_type *reg_data_type;  /* for type="type" */
        const char *group;  /* for group="general|float|vector" */
        void *arch_info;
        const struct reg_arch_type *type;
};

Change-Id: I2096b67adf94518ba0b8b23d8c6a9f64ad7932b8
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1382
Tested-by: jenkins
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-08-07 21:00:40 +00:00