Liviu Ionescu 08a814686d target/riscv: add semihosting support ...

- use the semihosting_common code
- to enable it, use the same commands as for arm

Signed-off-by: Liviu Ionescu <ilg@livius.net>

2018-06-12 18:21:01 +03:00

..

asm.h

Conform to OpenOCD style guide.

2017-12-26 11:38:11 -08:00

batch.c

Make reset work again for multicore

2018-03-23 12:53:24 -07:00

batch.h

Propagate error instead of calling abort().

2017-12-26 15:04:02 -08:00

debug_defines.h

Update debug defines to match spec

2018-06-06 13:43:35 -07:00

encoding.h

Make encoding.h pass style guide.

2018-04-20 14:47:27 -07:00

gdb_regs.h

Conform to OpenOCD style guide.

2017-12-26 11:38:11 -08:00

opcodes.h

Conform to OpenOCD style guide.

2017-12-26 11:38:11 -08:00

program.c

Don't always error if a debug program fails

2018-03-02 20:02:32 -08:00

program.h

Remove unused functionality.

2017-10-23 14:45:58 -07:00

riscv_semihosting.c

target/riscv: add semihosting support

2018-06-12 18:21:01 +03:00

riscv-011.c

target/riscv: add semihosting support

2018-06-12 18:21:01 +03:00

riscv-013.c

Update debug defines to match spec

2018-06-06 13:43:35 -07:00

riscv.c

target/riscv: add semihosting support

2018-06-12 18:21:01 +03:00

riscv.h

target/riscv: add semihosting support

2018-06-12 18:21:01 +03:00