forked from auracaster/openocd
28c24a5c41
There are ~900 Yoda conditions to be aligned to the coding style.
For recurrent Yoda conditions it's preferable using a trivial
script in order to minimize the review effort.
E.g. comparison of uppercase macro/enum with lowercase variable:
- ...(ERROR_OK == retval)...
+ ...(retval == ERROR_OK)...
Patch generated automatically with the command:
sed -i \
's/(\([A-Z][A-Z0-9_]*\) \([=!]=\) \([a-z][a-z0-9_]*\))/(\3 \2 \1)/g' \
$(find src/ -type f)
While there, remove the braces {} around a single statement block
to prevent warning from checkpatch.
Change-Id: If585b0a4b4578879c87b2dd74d9e0025e275ec6b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6354
Tested-by: jenkins
Reviewed-by: Xiang W <wxjstz@126.com>
79 lines
2.9 KiB
C
79 lines
2.9 KiB
C
/***************************************************************************
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* Copyright (C) 2007, 2008 by Ben Dooks *
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* ben@fluff.org *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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#ifndef OPENOCD_FLASH_NAND_S3C24XX_H
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#define OPENOCD_FLASH_NAND_S3C24XX_H
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/*
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* S3C24XX Series OpenOCD NAND Flash controller support.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#include "imp.h"
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#include "s3c24xx_regs.h"
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#include <target/target.h>
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struct s3c24xx_nand_controller {
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/* register addresses */
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uint32_t cmd;
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uint32_t addr;
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uint32_t data;
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uint32_t nfstat;
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};
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/* Default to using the un-translated NAND register based address */
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#undef S3C2410_NFREG
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#define S3C2410_NFREG(x) ((x) + 0x4e000000)
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#define S3C24XX_DEVICE_COMMAND() \
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COMMAND_HELPER(s3c24xx_nand_device_command, \
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struct nand_device *nand, \
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struct s3c24xx_nand_controller **info)
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S3C24XX_DEVICE_COMMAND();
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#define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
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do { \
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int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
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if (retval != ERROR_OK) \
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return retval; \
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} while (0)
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int s3c24xx_reset(struct nand_device *nand);
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int s3c24xx_command(struct nand_device *nand, uint8_t command);
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int s3c24xx_address(struct nand_device *nand, uint8_t address);
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int s3c24xx_write_data(struct nand_device *nand, uint16_t data);
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int s3c24xx_read_data(struct nand_device *nand, void *data);
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#define s3c24xx_write_page NULL
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#define s3c24xx_read_page NULL
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/* code shared between different controllers */
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int s3c2440_nand_ready(struct nand_device *nand, int timeout);
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int s3c2440_read_block_data(struct nand_device *nand,
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uint8_t *data, int data_size);
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int s3c2440_write_block_data(struct nand_device *nand,
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uint8_t *data, int data_size);
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#endif /* OPENOCD_FLASH_NAND_S3C24XX_H */
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