Tim Newsome 615709d140 Upstream a whole host of RISC-V changes. ...

Made no attempt to separate this out into reviewable chunks, since this
is all RISC-V-specific code developed at
https://github.com/riscv/riscv-openocd

Memory sample and repeat read functionality was left out of this change
since it requires some target-independent changes that I'll upstream
some other time.

Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6529
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

2021-10-25 16:12:05 +00:00

..

asm.h

Upstream tons of RISC-V changes.

2020-10-14 05:43:05 +01:00

batch.c

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

batch.h

Upstream tons of RISC-V changes.

2020-10-14 05:43:05 +01:00

debug_defines.h

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

encoding.h

Upstream tons of RISC-V changes.

2020-10-14 05:43:05 +01:00

gdb_regs.h

Upstream tons of RISC-V changes.

2020-10-14 05:43:05 +01:00

Makefile.am

Add RISC-V support.

2018-07-24 13:07:26 +01:00

opcodes.h

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

program.c

Upstream tons of RISC-V changes.

2020-10-14 05:43:05 +01:00

program.h

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

riscv_semihosting.c

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

riscv-011.c

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

riscv-013.c

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

riscv.c

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00

riscv.h

Upstream a whole host of RISC-V changes.

2021-10-25 16:12:05 +00:00