forked from auracaster/openocd
5159c59915
Backtraces performed by GDB on any thread other than the current thread would fail if hardware 8 byte ISR stack alignment was enabled on cortex_m targets. Stack reads now adjust the stored SP to account for a potential offset introduced by hardware. Fixed incorrect register offsets for cortex_m Nuttx frames by reading the TCB info symbols to determine correct offsets. Fixed offsets can no longer be used since the offsets have changed multiple times for different Nuttx versions. Tested on nuttx-12.1.0. Tested using custom stm32h7 board and custom s32k148 board variants. Built with CONFIG_ARCH_FPU enabled and disabled to test FPU and non FPU frame logic. Change-Id: Ifcbeefb0ddcfbcb528daa9d1d95732ca9584c9ef Signed-off-by: daniellizewski <daniellizewski@geotab.com> Reviewed-on: https://review.openocd.org/c/openocd/+/8180 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
25 lines
814 B
C
25 lines
814 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef INCLUDED_RTOS_NUTTX_STACKINGS_H
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#define INCLUDED_RTOS_NUTTX_STACKINGS_H
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#include "rtos.h"
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/* Used to index the list of retrieved symbols. See nuttx_symbol_list for the order. */
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enum nuttx_symbol_vals {
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NX_SYM_READYTORUN = 0,
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NX_SYM_PIDHASH,
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NX_SYM_NPIDHASH,
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NX_SYM_TCB_INFO,
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NX_SYM_REG_OFFSETS,
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};
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extern const struct rtos_register_stacking nuttx_stacking_cortex_m;
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extern const struct rtos_register_stacking nuttx_stacking_cortex_m_fpu;
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extern const struct rtos_register_stacking nuttx_riscv_stacking;
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extern const struct rtos_register_stacking nuttx_esp32_stacking;
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extern const struct rtos_register_stacking nuttx_esp32s2_stacking;
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extern const struct rtos_register_stacking nuttx_esp32s3_stacking;
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#endif /* INCLUDED_RTOS_NUTTX_STACKINGS_H */
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