Files
sw_openocd/tcl/cpld/xilinx-xc6s.cfg
Robert Jordens 804eefc259 pipistrello: ftdi-jtag/spartan6/jtagspi board
The Pipistrello is a low cost FPGA board with a Xilinx
Spartan6 LX45, a SPI flash and onboard FTDI JTAG.
This board is a good example use case for the jtagspi
flash driver talking through a proxy bitstream.

Change-Id: I04a80610ff825c36ebcb67b879507028eed141ad
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2846
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06 13:14:13 +01:00

55 lines
1.3 KiB
INI

# xilinx spartan6
# http://www.xilinx.com/support/documentation/user_guides/ug380.pdf
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME xc6s
}
# the 4 top bits (28:31) are the die stepping. ignore it.
jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
-expected-id 0x04000093 \
-expected-id 0x04001093 \
-expected-id 0x04002093 \
-expected-id 0x04004093 \
-expected-id 0x04024093 \
-expected-id 0x04008093 \
-expected-id 0x04028093 \
-expected-id 0x0400E093 \
-expected-id 0x0402E093 \
-expected-id 0x04011093 \
-expected-id 0x04031093 \
-expected-id 0x0401D093 \
-expected-id 0x0403D093
pld device virtex2 $_CHIPNAME.tap
set XC6S_CFG_IN 0x05
set XC6S_JSHUTDOWN 0x0d
set XC6S_JPROGRAM 0x0b
set XC6S_JSTART 0x0c
set XC6S_BYPASS 0x3f
proc xc6s_program {tap} {
global XC6S_JSHUTDOWN XC6S_JPROGRAM XC6S_JSTART XC6S_BYPASS
irscan $tap $XC6S_JSHUTDOWN
irscan $tap $XC6S_JPROGRAM
irscan $tap $XC6S_JSTART
irscan $tap $XC6S_BYPASS
}
#xtp038 and xc3sprog approach
proc xc6s_program_iprog {tap} {
global XC6S_JSHUTDOWN XC6S_JSTART XC6S_BYPASS XC6S_CFG_IN
irscan $tap $XC6S_JSHUTDOWN
runtest 16
irscan $tap $XC6S_CFG_IN
# xtp038 IPROG 16bit flipped
drscan $tap 16 0xffff 16 0x9955 16 0x66aa 16 0x850c 16 0x7000 16 0x0004
irscan $tap $XC6S_JSTART
runtest 32
irscan $tap $XC6S_BYPASS
runtest 1
}