forked from auracaster/openocd
Neither the initial loop to clear dirty registers (which visits all registers starting at R2 and counting upwards) nor the final explicit flushes ensure a write-back in arm_dpm_write_dirty_registers. This change makes sure that both our scratch registers (i.e. R0 and R1) are written back to the target. Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-on: http://openocd.zylin.com/4506 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>