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auracaster
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sw_openocd
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7ec7bc32fe01f632bdfa02649d92cdad9019e28e
sw_openocd
/
src
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target
/
riscv
T
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Tim Newsome
7ec7bc32fe
At least some memory writes work.
...
Change-Id: I6fcf261341f10ec34df01bb844744439d02471a8
2017-10-13 12:50:02 -07:00
..
asm.h
target/riscv/asm.h: use tab for indentation
2017-10-03 00:36:22 +03:00
batch.c
clang fix, don't allow unaligned uint64_t pointers
2017-09-18 14:56:46 -07:00
batch.h
clang fix, don't allow unaligned uint64_t pointers
2017-09-18 14:56:46 -07:00
debug_defines.h
Make constants unsigned for clang.
2017-09-18 14:23:59 -07:00
encoding.h
Implement hardware triggers that match spec.
2016-09-23 14:16:24 -07:00
gdb_regs.h
Share register numbers between 0.11 and 0.13.
2017-09-30 13:13:03 -07:00
opcodes.h
Fix indentation to match OpenOCD style.
2017-06-15 12:44:50 -07:00
program.c
At least some memory writes work.
2017-10-13 12:50:02 -07:00
program.h
At least some memory writes work.
2017-10-13 12:50:02 -07:00
riscv-011.c
Fix compile warnings.
2017-10-04 16:02:30 -07:00
riscv-013.c
At least some memory writes work.
2017-10-13 12:50:02 -07:00
riscv.c
WIP; doesn't work.
2017-10-12 11:45:52 -07:00
riscv.h
WIP; doesn't work.
2017-10-12 11:45:52 -07:00