Files
sw_openocd/tcl/target/nordic/nrf51.cfg
Tomas Vanek e85f9b2954 tcl/target/nordic: drop swj on swd only targets
Historically swj_newdap was necessary to handle HLA properly.
Since commit 60f104f450 ("hla_transport: split command
registration per transport") there is no point in using
swj_newdap on SWD only devices.

Drop 'transport select swd' from board files referring to
these targets.

While on it remove useless endianness option handling.

Change-Id: Icb4c04c79998369059044c203edcca61648aa936
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/9435
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2026-02-15 18:19:02 +00:00

56 lines
1.5 KiB
INI

# SPDX-License-Identifier: GPL-2.0-or-later
#
# script for Nordic nRF51 series, a Cortex-M0 chip
#
# Devices support SWD transport only
transport select swd
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME nrf51
}
# Work-area is a space in RAM used for flash programming
# By default use 16kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x4000
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0bb11477
}
swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
if {![using_hla]} {
# The chip supports standard ARM/Cortex-M0 SYSRESETREQ signal
cortex_m reset_config sysresetreq
}
flash bank $_CHIPNAME.flash nrf5 0x00000000 0 0 0 $_TARGETNAME
flash bank $_CHIPNAME.uicr nrf5 0x10001000 0 0 0 $_TARGETNAME
# The chip should start up from internal 16Mhz RC, so setting adapter
# clock to 1Mhz should be OK
adapter speed 1000
proc enable_all_ram {} {
# nRF51822 Product Anomaly Notice (PAN) #16 explains that not all RAM banks
# are reliably enabled after reset on some revisions (contrary to spec.) So after
# resetting we enable all banks via the RAMON register
mww 0x40000524 0xF
}
$_TARGETNAME configure -event reset-init { enable_all_ram }