forked from auracaster/openocd
faeae51d7f
The value returned by target_get_gdb_arch() is something specific for GDB. There could be several variants of the same CPU. If we start implementing all the variants, checking the string value, could become incorrect. It's better to check for xtensa->common_magic == XTENSA_COMMON_MAGIC Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I20f3fdced176c3b9ab00f889743161ecad7280f9 Reviewed-on: https://review.openocd.org/c/openocd/+/7536 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
126 lines
3.6 KiB
C
126 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/***************************************************************************
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* Semihosting API for Espressif chips *
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* Copyright (C) 2022 Espressif Systems Ltd. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <helper/log.h>
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#include <target/target.h>
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#include <target/semihosting_common.h>
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#include "esp_semihosting.h"
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#include "esp_xtensa.h"
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static struct esp_semihost_data __attribute__((unused)) *target_to_esp_semihost_data(struct target *target)
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{
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struct xtensa *xtensa = target->arch_info;
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if (xtensa->common_magic == XTENSA_COMMON_MAGIC)
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return &target_to_esp_xtensa(target)->semihost;
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/* TODO: add riscv */
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LOG_ERROR("Unknown target arch!");
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return NULL;
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}
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static int esp_semihosting_sys_seek(struct target *target, uint64_t fd, uint32_t pos, size_t whence)
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{
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struct semihosting *semihosting = target->semihosting;
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semihosting->result = lseek(fd, pos, whence);
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semihosting->sys_errno = errno;
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LOG_TARGET_DEBUG(target, "lseek(%" PRIx64 ", %" PRIu32 " %" PRId64 ")=%d", fd, pos, semihosting->result, errno);
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return ERROR_OK;
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}
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int esp_semihosting_common(struct target *target)
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{
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struct semihosting *semihosting = target->semihosting;
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if (!semihosting)
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/* Silently ignore if the semihosting field was not set. */
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return ERROR_OK;
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int retval = ERROR_NOT_IMPLEMENTED;
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/* Enough space to hold 4 long words. */
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uint8_t fields[4 * 8];
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/*
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* By default return an error.
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* The actual result must be set by each function
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*/
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semihosting->result = -1;
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semihosting->sys_errno = EIO;
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LOG_TARGET_DEBUG(target, "op=0x%x, param=0x%" PRIx64, semihosting->op, semihosting->param);
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switch (semihosting->op) {
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case ESP_SEMIHOSTING_SYS_DRV_INFO:
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/* Return success to make esp-idf application happy */
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retval = ERROR_OK;
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semihosting->result = 0;
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semihosting->sys_errno = 0;
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break;
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case ESP_SEMIHOSTING_SYS_SEEK:
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retval = semihosting_read_fields(target, 3, fields);
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if (retval == ERROR_OK) {
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uint64_t fd = semihosting_get_field(target, 0, fields);
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uint32_t pos = semihosting_get_field(target, 1, fields);
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size_t whence = semihosting_get_field(target, 2, fields);
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retval = esp_semihosting_sys_seek(target, fd, pos, whence);
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}
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break;
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case ESP_SEMIHOSTING_SYS_APPTRACE_INIT:
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case ESP_SEMIHOSTING_SYS_DEBUG_STUBS_INIT:
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case ESP_SEMIHOSTING_SYS_BREAKPOINT_SET:
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case ESP_SEMIHOSTING_SYS_WATCHPOINT_SET:
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/* For the time being only riscv chips support these commands
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* TODO: invoke riscv custom command handler */
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break;
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}
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return retval;
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}
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int esp_semihosting_basedir_command(struct command_invocation *cmd)
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{
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struct target *target = get_current_target(CMD_CTX);
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if (!target) {
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LOG_ERROR("No target selected");
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return ERROR_FAIL;
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}
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struct semihosting *semihosting = target->semihosting;
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if (!semihosting) {
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command_print(CMD, "semihosting not supported for current target");
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return ERROR_FAIL;
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}
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if (!semihosting->is_active) {
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if (semihosting->setup(target, true) != ERROR_OK) {
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LOG_ERROR("Failed to Configure semihosting");
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return ERROR_FAIL;
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}
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semihosting->is_active = true;
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}
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if (CMD_ARGC > 0) {
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free(semihosting->basedir);
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semihosting->basedir = strdup(CMD_ARGV[0]);
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if (!semihosting->basedir) {
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command_print(CMD, "semihosting failed to allocate memory for basedir!");
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return ERROR_FAIL;
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}
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}
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command_print(CMD, "DEPRECATED! semihosting base dir: %s",
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semihosting->basedir ? semihosting->basedir : "");
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return ERROR_OK;
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}
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